Patents by Inventor Dan W. Chilcott

Dan W. Chilcott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7134179
    Abstract: A process of forming a capacitive audio transducer, preferably having an all-silicon monolithic construction that includes capacitive plates defined by doped single-crystal silicon layers. The capacitive plates are defined by etching the single-crystal silicon layers, and the capacitive gap therebetween is accurately established by wafer bonding, yielding a transducer that can be produced by high-volume manufacturing practices.
    Type: Grant
    Filed: December 13, 2004
    Date of Patent: November 14, 2006
    Assignee: Delphi Technologies, Inc.
    Inventors: John E. Freeman, William J. Baney, Timothy M. Betzner, Dan W. Chilcott, John C. Christenson, Timothy A. Vas, George M Queen, Stephen P Long
  • Patent number: 6829814
    Abstract: A process of forming a capacitive audio transducer, preferably having an all-silicon monolithic construction that includes capacitive plates defined by doped single-crystal silicon layers. The capacitive plates are defined by etching the single-crystal silicon layers, and the capacitive gap therebetween is accurately established by wafer bonding, yielding a transducer that can be produced by high-volume manufacturing practices.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: December 14, 2004
    Assignee: Delphi Technologies, Inc.
    Inventors: John E. Freeman, William J. Baney, Timothy M. Betzner, Dan W. Chilcott, John C. Christenson, Timothy A. Vas, George M Queen, Stephen P Long
  • Patent number: 6828560
    Abstract: An infrared sensor including an absorber for absorbing incident infrared power to produce a signal representing the temperature of a target object, a frame supporting a membrane which carries the absorber, the frame including a plurality of reflecting surfaces disposed about the circumference of an opening over which the membrane spans for reflecting incident infrared power toward the absorber. By concentrating incident infrared power through reflection, the temperature difference between the absorber and the surrounding frame is increased, thereby producing an increased electrical output from the sensor.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: December 7, 2004
    Assignee: Delphi Technologies, Inc.
    Inventors: David K. Lambert, Han-Sheng Lee, Dan W. Chilcott, Hamid R. Borzabadi, Qin Jiang, James H. Logsdon
  • Patent number: 6828172
    Abstract: A process using integrated sensor technology in which a micromachined sensing element and signal processing circuit are combined on a single semiconductor substrate to form, for example, an infrared sensor. The process is based on modifying a CMOS process to produce an improved layered micromachined member, such as a diaphragm, after the circuit fabrication process is completed. The process generally entails forming a circuit device on a substrate by processing steps that include forming multiple dielectric layers and at least one conductive layer on the substrate. The dielectric layers comprise an oxide layer on a surface of the substrate and at least two dielectric layers that are in tension, with the conductive layer being located between the two dielectric layers. The surface of the substrate is then dry etched to form a cavity and delineate the diaphragm and a frame surrounding the diaphragm.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: December 7, 2004
    Assignee: Delphi Technologies, Inc.
    Inventors: Abhijeet V. Chavan, James H. Logsdon, Dan W. Chilcott, John C. Christenson, Robert K. Speck
  • Publication number: 20040241507
    Abstract: A system for storage and retrieval of elemental hydrogen on a silicon substrate. The hydrogen storage members have at least one surface to which elemental hydrogen either readily bonds or into which the elemental hydrogen is readily adsorbed, and from which desorption of the elemental hydrogen may be controlled. The silicon may be monocrystalline or polycrystalline and may be formed as sliced wafers, as very fine extruded columns, or may be derived from waste in the manufacture of integrated circuits. The silicon surfaces may be treated in a variety of ways to increase porosity and surface area, and thus to increase storage efficiency for elemental hydrogen. The system is useful in supplying fuel to a fuel cell system for generating electric power, as well as for cooperating with a control system to form a stand-alone Auxiliary Power Unit.
    Type: Application
    Filed: April 15, 2004
    Publication date: December 2, 2004
    Inventors: Peter J. Schubert, John C. Christenson, Dan W. Chilcott
  • Patent number: 6793389
    Abstract: An integrated sensor comprising a thermopile transducer and signal processing circuitry that are combined on a single semiconductor substrate, such that the transducer output signal is sampled in close vicinity by the processing circuitry. The sensor comprises a frame formed of a semiconductor material that is not heavily doped, and with which a diaphragm is supported. The diaphragm has a first surface for receiving thermal (e.g., infrared) radiation, and comprises multiple layers that include a sensing layer containing at least a pair of interlaced thermopiles. Each thermopile comprises a sequence of thermocouples, each thermocouple comprising dissimilar electrically-resistive materials that define hot junctions located on the diaphragm and cold junctions located on the frame. The signal processing circuitry is located on the frame and electrically interconnected with the thermopiles.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: September 21, 2004
    Assignee: Delphi Technologies, Inc.
    Inventors: Abhijeet V. Chavan, James H. Logsdon, Dan W. Chilcott, Han-Sheng S. Lee, David K. Lambert, Timothy A. Vas
  • Patent number: 6750521
    Abstract: A semiconductor device and method by which a device chip with a micromachine is directly surface mounted to a circuit board. A capping chip is bonded to the device chip and encloses the micromachine. The capping chip has a first surface facing the device chip, an oppositely-disposed second surface, and electrical interconnects through the capping chip between the first and second surfaces. The electrical interconnects electrically communicate with runners on the device chip that are electrically connected to the micromachine, thereby providing a signal path from the micromachine to the exterior of the device. The capping chip further includes bond pads for electrical communication with the electrical interconnects. With the bond pads, the capping chip can be surface mounted to a circuit board by reflowing solder bumps formed on the bond pads.
    Type: Grant
    Filed: October 22, 1999
    Date of Patent: June 15, 2004
    Assignee: Delphi Technologies, Inc.
    Inventors: Dan W. Chilcott, Hamid Reza Borzabadi, Douglas Ray Sparks
  • Publication number: 20030147449
    Abstract: An integrated sensor comprising a thermopile transducer and signal processing circuitry that are combined on a single semiconductor substrate, such that the transducer output signal is sampled in close vicinity by the processing circuitry. The sensor comprises a frame formed of a semiconductor material that is not heavily doped, and with which a diaphragm is supported. The diaphragm has a first surface for receiving thermal (e.g., infrared) radiation, and comprises multiple layers that include a sensing layer containing at least a pair of interlaced thermopiles. Each thermopile comprises a sequence of thermocouples, each thermocouple comprising dissimilar electrically-resistive materials that define hot junctions located on the diaphragm and cold junctions located on the frame. The signal processing circuitry is located on the frame and electrically interconnected with the thermopiles.
    Type: Application
    Filed: October 18, 2002
    Publication date: August 7, 2003
    Applicant: Delphi Technologies, Inc.
    Inventors: Abhijeet V. Chavan, James H. Logsdon, Dan W. Chilcott, Han-Sheng Lee, David K. Lambert, Timothy A. Vas
  • Publication number: 20030148620
    Abstract: A process using integrated sensor technology in which a micromachined sensing element and signal processing circuit are combined on a single semiconductor substrate to form, for example, an infrared sensor. The process is based on modifying a CMOS process to produce an improved layered micromachined member, such as a diaphragm, after the circuit fabrication process is completed. The process generally entails forming a circuit device on a substrate by processing steps that include forming multiple dielectric layers and at least one conductive layer on the substrate. The dielectric layers comprise an oxide layer on a surface of the substrate and at least two dielectric layers that are in tension, with the conductive layer being located between the two dielectric layers. The surface of the substrate is then dry etched to form a cavity and delineate the diaphragm and a frame surrounding the diaphragm.
    Type: Application
    Filed: October 18, 2002
    Publication date: August 7, 2003
    Inventors: Abhijeet V. Chavan, James H. Logsdon, Dan W. Chilcott, John C. Christenson, Robert K. Speck
  • Publication number: 20030141455
    Abstract: An infrared sensor including an absorber for absorbing incident infrared power to produce a signal representing the temperature of a target object, a frame supporting a membrane which carries the absorber, the frame including a plurality of reflecting surfaces disposed about the circumference of an opening over which the membrane spans for reflecting incident infrared power toward the absorber. By concentrating incident infrared power through reflection, the temperature difference between the absorber and the surrounding frame is increased, thereby producing an increased electrical output from the sensor.
    Type: Application
    Filed: January 31, 2002
    Publication date: July 31, 2003
    Inventors: David K. Lambert, Han-Sheng Lee, Dan W. Chilcott, Hamid R. Borzabadi, Qin Jiang, James H. Logsdon
  • Patent number: 5413955
    Abstract: A process for silicon wafer-to-wafer bonding at temperatures lower than 500.degree. C. has been developed. It consists of (1) treating the cleaned surfaces to make them smooth and hydrophilic, (2) initiating the bond by making intimate contact between wafers and (3) enhancing the bond strength at elevated temperatures. This bonding process can be applied to sensor packaging.
    Type: Grant
    Filed: December 21, 1993
    Date of Patent: May 9, 1995
    Assignee: Delco Electronics Corporation
    Inventors: Han-Sheng Lee, Steven E. Staller, Dan W. Chilcott
  • Patent number: 5385652
    Abstract: Generally, the invention includes a method of wet electrochemical etching of a substrate with an anisotropic etchant using a silver/silver oxide (Ag/Ag.sub.2 O) reference electrode. The silver/silver oxide reference electrode can be used with electrochemical etch-stop techniques to fabricate a variety of semiconductor devices including microsensors and microactuator in a variety of anisotropic etchants. The silver/silver oxide reference electrode eliminates the need to use glass or plastic tubes.
    Type: Grant
    Filed: December 17, 1993
    Date of Patent: January 31, 1995
    Assignee: Delco Electronics Corporation
    Inventors: Su-Chee S. Wang, Dan W. Chilcott
  • Patent number: 5369057
    Abstract: This invention generally relates to the provision of a vent path during the bonding of silicon wafers and the subsequent encapsulation of the individual devices. A double-sided polished silicon wafer is used for the device wafer. The device wafer includes circuitry, thin membranes and metal interconnections. When bonding a bottom wafer to the device wafer, a vented path exists between the wafers. The venting path includes serpentine shape channel formed by interdigitated fingers and cavities. The cavity and the interdigitated patterns can be etched either together or separately into either wafer. A top wafer has a cavity formed therein. When the top device and bottom wafers are bonded together, the venting path is sealed by dipping the device in a sealing liquid. The serpentine path prevents the sealing liquid from reaching the cavity.
    Type: Grant
    Filed: December 21, 1993
    Date of Patent: November 29, 1994
    Assignee: Delco Electronics Corporation
    Inventors: Han-Sheng Lee, Steven E. Staller, James H. Logsdon, Dan W. Chilcott
  • Patent number: 5177331
    Abstract: An impact detector includes a center chip of micromachined silicon, a top cap, and a back plate, with the center chip being sandwiched between the top cap and the back plate. The center chip is micromachined to provide a seismic mass, a perimeter ring, and a plurality of beams interconnecting the perimeter ring and the seismic mass. The center chip and back plate mount aligned switch contacts which close to each other when the seismic mass moves from its static or nondisplaced position to its operative or displaced position. An electrostatic attractive force is generated between the seismic mass and the back plate.
    Type: Grant
    Filed: July 5, 1991
    Date of Patent: January 5, 1993
    Assignee: Delco Electronics Corporation
    Inventors: David B. Rich, Dan W. Chilcott