Abstract: In a computing device, a computerized method and a non-transitory storage medium are applied in checking whether the transmission lines in a stored wiring diagram meet a certain criterion in relation to vias in the routes of differential pairs. A transmission line is selected to determine whether or not the line belongs to a differential pair and passes through at least one via. Another transmission line of the differential pair is obtained for analysis when the selected transmission line passes through at least one via. Sizes of vias in the respective routes of the differential pair are compared and a distance between the vias of the differential pair is compared. The differential pair, and the sizes of vias which comply or do not comply with the criterion are recorded and displayed in a list of results.

Abstract: In a computing device, a computerized method and a non-transitory storage medium are applied in checking whether the transmission lines in a stored wiring diagram meet a certain criterion in relation to vias in the routes of differential pairs. A transmission line is selected to determine whether or not the line belongs to a differential pair and passes through at least one via. Another transmission line of the differential pair is obtained for analysis when the selected transmission line passes through at least one via. Sizes of vias in the respective routes of the differential pair are compared and a distance between the vias of the differential pair is compared. The differential pair, and the sizes of vias which comply or do not comply with the criterion are recorded and displayed in a list of results.

Abstract: In a computing device, a computerized method and a non-transitory storage medium are applied in checking a stored wiring diagram for high-noise components in close proximity to signal lines. An electronic component is selected in a PCB wiring file. A checking range of the selected electronic component is determined for searching for one or more signal transmission lines which pass within the checking range in the PCB wiring file. Basic information of the one or more signal transmission lines is recorded into a result list which is displayed on a display unit of the computing device.

Abstract: A printed circuit board includes a first signal layer, a first reference layer, a second signal layer, and a third signal layer in that order and includes a first slanted via and a second slanted via. The first signal layer includes an parallel first transmission wire and a second transmission wire. The first and second transmission wires are coupled with each other and cooperatively constitute a first differential pair with an edge-coupled structure. The second signal layer includes a third transmission wire. The third signal layer includes a fourth transmission wire parallel to and coupled with the third transmission wire. The third and fourth transmission wires cooperatively constitute a second differential pair with a broadside-coupled structure. The first slanted via obliquely are interconnected between the first transmission wire and the third transmission wire. The second slanted via obliquely are interconnected between the second transmission wire and the fourth transmission wire.

Abstract: A method for setting a signal-equalizing system for use in an electronic device includes the following steps. Outputting a connection status of each channel and a number of misconnect options respectively associated with each channel to a display unit of the electronic device. Then, detecting whether at least one misconnect option is selected. If yes, determining a misconnected channel and adjusting the receiving setting for the receiving port of the misconnected channel to match with the transmitting setting for the transmitting port of the misconnected channel according to settings for each channel stored in the electronic device. The stored settings for each channel include a transmitting setting for the transmitting port of the channel and a receiving setting for the receiving port of the channel that matches the transmitting setting.

Abstract: In a method for checking layout of a printed circuit board (PCB) using an electronic device, a power line is selected from a layout diagram of the PCB. The method searches for one or more signal lines which are overlapping with the selected power line from the layout diagram of the PCB. The method further locates attribute data of the searched signal lines and the selected power line in the layout diagram of the PCB, and displays the attribute data of the searched signal lines and the selected power line on a display device of the electronic device.

Abstract: In a computing device, a computerized method and a non-transitory storage medium are applied in checking a stored wiring diagram for high-noise components in close proximity to signal lines. An electronic component is selected in a PCB wiring file. A checking range of the selected electronic component is determined for searching for one or more signal transmission lines which pass within the checking range in the PCB wiring file. Basic information of the one or more signal transmission lines is recorded into a result list which is displayed on a display unit of the computing device.

Abstract: A computing system includes a drawing unit and a layout unit. The computing system sets components parameters to components of a circuit diagram of a printed circuit board (PCB). The drawing unit draws the circuit diagram by using the components with the components parameters. If the drawing unit wants to use a component more than once, the computing system copies the component and the corresponding components parameters. The drawing unit uses the copied components and the corresponding parameters. If the circuit diagram has been drawn, the layout unit loads the circuit diagram and wires the PCB according to the components and the components parameters in the circuit diagram.

Abstract: A computing device reads a printed circuit board (PCB) layout file from a storage device. The PCB layout file includes arrangement information of signal lines, power lines, and power through-holes arranged on a PCB. Furthermore, the computing device sets a reference distance between a selected power through-hole and a neighboring signal line, and searches for one or more line segments of one or more signal lines where the a distance between each of the one or more line segment and the selected power through-hole is less than the reference distance.

Abstract: A computing device reads a printed circuit board (PCB) layout file from a storage device. The PCB layout file includes arrangement information of signal lines, power lines, and power through-holes arranged on a PCB. Furthermore, the computing device sets a reference distance between a selected power through-hole and a neighboring signal line, and searches for one or more line segments of one or more signal lines where the a distance between each of the one or more line segment and the selected power through-hole is less than the reference distance.

Abstract: In a method for inspecting the layout of a printed circuit board (PCB), a component to be checked is determined from an electronic layout diagram of the PCB, and a power transmission line which may be serving that component is selected. The layout diagram is checked to determine whether the component is connected to the power transmission line, and further checked to determine whether more than one ground pins of the component is connected to the power transmission line. Vias that are shared by two or more ground pins of the component are determined if more than one ground pin is connected to the power transmission line. Shared vias are marked on the layout diagram.

Abstract: In a method for inspecting the layout of a printed circuit board (PCB), a component to be checked is determined from an electronic layout diagram of the PCB, and a power transmission line which may be serving that component is selected. The layout diagram is checked to determine whether the component is connected to the power transmission line, and further checked to determine whether more than one ground pins of the component is connected to the power transmission line. Vias that are shared by two or more ground pins of the component are determined if more than one ground pin is connected to the power transmission line. Shared vias are marked on the layout diagram.

Abstract: In a method for checking layout of a printed circuit board (PCB) using an electronic device, a power line is selected from a layout diagram of the PCB. The method searches for one or more signal lines which are overlapping with the selected power line from the layout diagram of the PCB. The method further locates attribute data of the searched signal lines and the selected power line in the layout diagram of the PCB, and displays the attribute data of the searched signal lines and the selected power line on a display device of the electronic device.

Abstract: A printed circuit board includes a first signal layer, a first reference layer, a second signal layer, and a third signal layer in that order and includes a first slanted via and a second slanted via. The first signal layer includes an parallel first transmission wire and a second transmission wire. The first and second transmission wires are coupled with each other and cooperatively constitute a first differential pair with an edge-coupled structure. The second signal layer includes a third transmission wire. The third signal layer includes a fourth transmission wire parallel to and coupled with the third transmission wire. The third and fourth transmission wires cooperatively constitute a second differential pair with a broadside-coupled structure. The first slanted via obliquely are interconnected between the first transmission wire and the third transmission wire. The second slanted via obliquely are interconnected between the second transmission wire and the fourth transmission wire.

Abstract: A printed circuit board (PCB) with compound via includes a substrate and a pair of through holes passing through the substrate. The substrate includes a signal layer which is the top layer of the substrate, a first reference layer adjacent to the signal layer, and a second reference layer not adjacent to the signal layer. A first and a second pair of pads are mounted on the signal layer. Each of the through holes extends through the first pair of pads such that the through hole and the first pair of pads jointly form a compound via. A first reserved opening is formed on the first reference layer and corresponds to the first and the second pair of pads and the compound via. A second reserved opening is formed on the second reference layer and surrounds the through hole thereon.

Abstract: A computing system includes a drawing unit and a layout unit. The computing system sets components parameters to components of a circuit diagram of a printed circuit board (PCB). The drawing unit draws the circuit diagram by using the components with the components parameters. If the drawing unit wants to use a component more than once, the computing system copies the component and the corresponding components parameters. The drawing unit uses the copied components and the corresponding parameters. If the circuit diagram has been drawn, the layout unit loads the circuit diagram and wires the PCB according to the components and the components parameters in the circuit diagram.

Abstract: A printed circuit board (PCB) with compound via includes a substrate and a pair of through holes passing through the substrate. The substrate includes a signal layer which is the top layer of the substrate, a first reference layer adjacent to the signal layer, and a second reference layer not adjacent to the signal layer. A first and a second pair of pads are mounted on the signal layer. Each of the through holes extends through the first pair of pads such that the through hole and the first pair of pads jointly form a compound via. A first reserved opening is formed on the first reference layer and corresponds to the first and the second pair of pads and the compound via. A second reserved opening is formed on the second reference layer and surrounds the through hole thereon.