Abstract: The present disclosure provides a display panel and a display device, which can lower a probability of metal being remained in the drain hole of the planarization layer and thus improve the related display defects. The display panel includes a plurality of sub-pixels arranged in an array. A region between any two adjacent columns of sub-pixels is a column spacing region. The column spacing region includes a first column spacing region with signal touch line and a second column spacing region. In each column of sub-pixels adjacent to the first column spacing region, adjacent ends of any two adjacent sub-pixels close to the first column spacing region are aligned in a sub-pixel column direction. In each column of sub-pixels adjacent to the second column spacing region, adjacent ends of at least two adjacent sub-pixels close to the second column spacing region are misaligned in the sub-pixel column direction.

Abstract: An array substrate and a liquid crystal display panel including the array substrate are provided. The array substrate includes: multiple pixel units; at least one additional functional area located in each row of a matrix formed by the multiple pixel units, where the additional functional area is provided with a gate signal detecting transistor; and a detection signal output line and a preset signal line connected with each other. By detecting whether a drive signal on a gate line is normal using the gate signal detecting transistor, the problem of manually detecting one-by one whether a signal on a gate line is normal can be avoided, thereby improving the detection efficiency and accuracy.

Abstract: A pixel structure, array substrate, display panel, display device, and driving method of the display device are provided. The pixel structure includes a plurality of data lines and a plurality of scan lines; a plurality of pixel units formed by intersecting the data lines with the scan lines. Each of the pixel units corresponds to one of the data lines and one of the scan lines; and the pixel unit includes a pixel electrode and a thin film transistor therein. In one of two adjacent columns of pixel units, a pixel electrode of each pixel unit is electrically connected with a thin film transistor of the pixel unit; and in the other one of the two adjacent columns of pixel units, a pixel electrode of each pixel unit in a row is electrically connected with a thin film transistor of a pixel unit in an adjacent row.

Abstract: A display panel and an electronic device are provided. The display panel includes: multiple pixel units arranged in an array; multiple data lines for providing data signals for the pixel units; multiple gate lines for providing gate scanning signals for the pixel units; and at least one enhancing region, where at least one gate signal enhancing transistor and at least one of the pixel units are disposed in the enhancing region, the gate signal enhancing transistor is configured to pre-charge a gate line for a pixel row where the gate signal enhancing transistor is located. An electronic device including the display panel has a quick response speed and a narrow border region.

Abstract: An array substrate and a liquid crystal display panel including the array substrate are provided. The array substrate includes: multiple pixel units; at least one additional functional area located in each row of a matrix formed by the multiple pixel units, where the additional functional area is provided with a gate signal detecting transistor; and a detection signal output line and a preset signal line connected with each other. By detecting whether a drive signal on a gate line is normal using the gate signal detecting transistor, the problem of manually detecting one-by one whether a signal on a gate line is normal can be avoided, thereby improving the detection efficiency and accuracy.

Abstract: The present disclosure provides a touch panel surface touch recognition method for a touch control device. The method includes acquiring real-time user touch parameters of a user touch; using the acquired real-time user touch parameters to query a pre-established database and to obtain a user touch parameter range corresponding to the acquired real-time user touch parameters; and recognizing an overall touch type based on the user touch parameter range. The pre-established database stores relationship data between pre-configured user touch types and user touch parameter ranges corresponding to the pre-configured user touch types; and different user touch parameter ranges correspond to different pre-configured touch types.

Abstract: The disclosure provides a pixel structure, a manufacturing method of a pixel structure, an array substrate, a display panel, and a display device. The pixel structure includes a plurality of data lines and a plurality of scan lines, and a plurality of pixel units formed by intersecting the plurality of data lines with the plurality of scan lines. A pixel unit corresponds to one of the plurality of data lines and one of the plurality of scan lines. The pixel unit includes a pixel electrode and a TFT. The pixel electrode of the pixel unit in a row is electrically connected to a TFT of a pixel unit in a preceding adjacent row of the pixel electrode of the pixel unit.

Abstract: An array substrate and a liquid crystal display panel including the array substrate are provided. The array substrate includes: multiple pixel units; at least one additional functional area located in each row of a matrix formed by the multiple pixel units, where the additional functional area is provided with a gate signal detecting transistor; and a detection signal output line and a preset signal line connected with each other. By detecting whether a drive signal on a gate line is normal using the gate signal detecting transistor, the problem of manually detecting one-by one whether a signal on a gate line is normal can be avoided, thereby improving the detection efficiency and accuracy.

Abstract: The present disclosure relates to an array substrate, a display panel and a display device. The array substrate includes a display area and a peripheral area surrounding the display area. The peripheral area includes a gate drive circuit which is electrically connected to a plurality of signal lines so as to provide the scanning signals to the display area. The display area includes a plurality of sub-pixels arranged in an array pattern and at least one wiring areas disposed between the sub-pixels, at least one signal line which is electrically connected to the gate drive circuit is provided in the at least one wiring areas.

Abstract: The present disclosure provides a pixel structure, a manufacturing method of a pixel structure, an array substrate, a display panel, and a display device. The pixel structure includes a plurality of data lines, a plurality of scan lines, a plurality of pixel units and a pixel electrode in each pixel unit including a plurality of slits. An end of the slit includes at least one corner. The white pixel unit includes a first TFT and a second TFT. In a row of pixel units, a first TFT of each white pixel unit is electrically connected to a pixel electrode of the white pixel unit, and a second TFT of each white pixel unit is electrically connected to a pixel electrode of a pixel unit adjacent to the white pixel unit. The corner of the slit in the pixel electrode electrically connected with the second TFT extends toward the second TFT.

Abstract: A gate drive circuit is disclosed. The drive circuit includes M cascaded shift registers, where M is a natural number, and a clock controller configured to generate two reverse-phase clock signals. The drive circuit also includes a high level controller configured to generate a high level signal, and a low level controller configured to generate a low level signal, where one of the high level controller and the low level controller is configured to generate an initial pulse signal during an initial stage. The drive circuit also includes a start unit cascaded with the M shift registers, where the start unit is configured to provide a start signal to the shift registers.

Abstract: A pixel structure and manufacturing method therefor, an array structure, a display panel and a display device. And the pixel structure includes data lines; scan lines; pixel units formed by intersecting the data lines with the scan lines, where each pixel unit corresponds to one data line and one scan line; a TFT and a pixel electrode disposed in each of pixel units, where the pixel electrode includes slits, at least one of which includes at least one corner area at an end thereof; where the pixel electrode in a row is electrically connected to a TFT in a pixel unit, the pixel unit is disposed in the same row as and adjacently at one side of the pixel electrode, and at least one corner area of the pixel electrode extends toward the TFT electrically connected to the pixel electrode.

Abstract: The array substrate includes: a substrate; a plurality of scan lines and a plurality of data lines disposed on the substrate intersecting each other to define a plurality of pixel elements and insulated from each other; a first transparent conductive layer disposed on the substrate; and a second transparent conductive layer disposed on the substrate and in parallel to and insulated from the first transparent conductive layer. The data lines, the first transparent conductive layer, and the second transparent conductive layer each comprise a plurality of bended portions, and the bended portions of the second transparent conductive layer are parallel to those of the first transparent conductive layer; additionally or alternatively; the bended portions of the data lines are parallel to those of the first transparent conductive layer or the second transparent conductive layer.

Abstract: An array substrate is provided. The array substrate includes a display region and a non-display region; the display region includes a first display region, a second display region, and a third display region arranged in sequence; the non-display region includes a first control module and a second control module; the display region is configured with a plurality of electrode blocks; the electrode blocks located in the first display region are connected with the first control module; the electrode blocks located in the third display region are connected with the second control module; the second display region includes at least one column of the electrode blocks, regarding each of the at least one column, some of the electrode blocks are connected with the first control module, and others are connected with the second control module. Accordingly, vision disparity can be avoided by alternately connecting the electrode blocks with different control modules.

Abstract: An array substrate includes a substrate, a plurality of gate lines and a plurality of data lines intersecting each other and being insulating from each other, and a plurality of pixel units arranged in an array and surrounded by the intersecting gate lines and data lines. The array substrate also includes at least one temperature measuring unit and at least one gate signal start control line. The temperature measuring unit includes at least one thin film transistor. The array substrate further includes a signal input line, a signal output line, and resistor is arranged on the signal input line. The temperature measuring unit includes a first terminal electrically connected with the signal input line and a second terminal electrically connected with the signal output line.

Abstract: The present disclosure relates to an array substrate, a display panel and a display device. The array substrate includes a display area and a peripheral area surrounding the display area. The peripheral area includes a gate drive circuit which is electrically connected to a plurality of signal lines so as to provide the scanning signals to the display area. The display area includes a plurality of sub-pixels arranged in an array pattern and at least one wiring areas disposed between the sub-pixels, at least one signal line which is electrically connected to the gate drive circuit is provided in the at least one wiring areas.

Abstract: A gate drive circuit is disclosed. The drive circuit includes M cascaded shift registers, where M is a natural number, and a clock controller configured to generate two reverse-phase clock signals. The drive circuit also includes a high level controller configured to generate a high level signal, and a low level controller configured to generate a low level signal, where one of the high level controller and the low level controller is configured to generate an initial pulse signal during an initial stage. The drive circuit also includes a start unit cascaded with the M shift registers, where the start unit is configured to provide a start signal to the shift registers.

Abstract: A display panel and an electronic device are provided. The display panel includes: multiple pixel units arranged in an array; multiple data lines for providing data signals for the pixel units; multiple gate lines for providing gate scanning signals for the pixel units; and at least one enhancing region, where at least one gate signal enhancing transistor and at least one of the pixel units are disposed in the enhancing region, the gate signal enhancing transistor is configured to pre-charge a gate line for a pixel row where the gate signal enhancing transistor is located. An electronic device including the display panel has a quick response speed and a narrow border region.

Abstract: The disclosure provides a pixel structure, a manufacturing method of a pixel structure, an array substrate, a display panel, and a display device. The pixel structure includes a plurality of data lines and a plurality of scan lines, and a plurality of pixel units formed by intersecting the plurality of data lines with the plurality of scan lines. A pixel unit corresponds to one of the plurality of data lines and one of the plurality of scan lines. The pixel unit includes a pixel electrode and a TFT. The pixel electrode of the pixel unit in a row is electrically connected to a TFT of a pixel unit in a preceding adjacent row of the pixel electrode of the pixel unit.

Abstract: An array substrate and a liquid crystal display panel including the array substrate are provided. The array substrate includes: multiple pixel units; at least one additional functional area located in each row of a matrix formed by the multiple pixel units, where the additional functional area is provided with a gate signal detecting transistor; and a detection signal output line and a preset signal line connected with each other. By detecting whether a drive signal on a gate line is normal using the gate signal detecting transistor, the problem of manually detecting one-by one whether a signal on a gate line is normal can be avoided, thereby improving the detection efficiency and accuracy.