Patents by Inventor Dandan Yi

Dandan Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12293800
    Abstract: In addition to word line related short circuits within the blocks of the array structure of a non-volatile memory device, such as NAND memory, word line related shorts can also occur in the routing for supplying the word lines of the memory blocks. Depending on the layout of the routing, some shorts for the word lines associated with one block can affect other blocks of the memory array. In particular, if the routing of a pair of adjacent local supply lines are adjacent to a global supply line, a short between the pair of adjacent local supply lines for one block can lead, through the global supply line, to defects in another of the block. Techniques are presented for detecting these layout related problematic word lines.
    Type: Grant
    Filed: July 3, 2023
    Date of Patent: May 6, 2025
    Assignee: Sandisk Technologies, Inc.
    Inventors: Xuan Tian, Liang Li, Dandan Yi, Jojo Xing, Vincent Yin
  • Patent number: 12243605
    Abstract: In some situations, a leak on a wordline may be a localized problem that causes data loss in a block that contains the wordline. In other situations, such as when the leak occurs near a peripheral wordline routing area, the leak can affect the entire memory die. The storage system provided herein has a fatal wordline leak detector that determines the type of leak and, accordingly, whether just the block should be retired or whether related blocks should be retired.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: March 4, 2025
    Assignee: Sandisk Technologies, Inc.
    Inventors: Xuan Tian, Liang Li, Dandan Yi, Jojo Xing, Vincent Yin, Yongke Sun, Alan Bennett
  • Publication number: 20250006287
    Abstract: In addition to word line related short circuits within the blocks of the array structure of a non-volatile memory device, such as NAND memory, word line related shorts can also occur in the routing for supplying the word lines of the memory blocks. Depending on the layout of the routing, some shorts for the word lines associated with one block can affect other blocks of the memory array. In particular, if the routing of a pair of adjacent local supply lines are adjacent to a global supply line, a short between the pair of adjacent local supply lines for one block can lead, through the global supply line, to defects in another of the block. Techniques are presented for detecting these layout related problematic word lines.
    Type: Application
    Filed: July 3, 2023
    Publication date: January 2, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventors: Xuan Tian, Liang Li, Dandan Yi, Jojo Xing, Vincent Yin
  • Publication number: 20240386962
    Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells each connected to word lines and disposed in memory holes. The memory holes are arranged in rows comprising strings which are grouped into blocks comprising a first plane and a second plane. A control means is configured to program memory cells of the first plane and the second plane connected to one of the word lines using iterations of a program operation. The control means terminates programming of the first plane prior to completing programming of the first plane in response to determining the first plane programs slower than the second plane by a predetermined number of the iterations of the program operation. The control means adjusts the predetermined number of the iterations based on an additional verify iteration performed on at least some of the memory cells beyond the iterations of the program operation.
    Type: Application
    Filed: August 3, 2023
    Publication date: November 21, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Dandan Yi, Xuan Tian, Liang Li, Vincent Yin
  • Publication number: 20240312538
    Abstract: A non-volatile memory system is configured to perform a multiplane erase process that concurrently erases groups of memory cells in multiple planes. Based on that multiplane erase process, the memory system determines that a first group of memory cells in a first plane of the multiple planes is slow to erase. As a result, the system will perform one or more multiplane erase processes for the groups of memory cells in multiple planes without erasing the first group of memory cells in the first plane as part of the multiplane erase process(es).
    Type: Application
    Filed: July 25, 2023
    Publication date: September 19, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Liang Li, Dandan Yi, Dana Lee
  • Publication number: 20240073808
    Abstract: A cell selection method includes receiving, by an access stratum (AS) of a terminal device, first information from a non-access stratum (NAS) of the terminal device. The first information includes identity information of a first public land mobile network (PLMN) to be accessed by the terminal device. The cell selection method also includes determining, by the AS based on the first information, whether to camp on a first candidate cell. The first candidate cell supports the first PLMN. The first candidate cell satisfies a first camping condition. The first camping condition comprises a cell selection criterion and a service requirement. The service requirement is a preset threshold of a parameter reflecting signal quality of a cell.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Inventors: Dandan YI, Li QIANG, Gong CHEN, Xiaofeng LUO, Lutao WEN
  • Publication number: 20240006010
    Abstract: In some situations, a leak on a wordline may be a localized problem that causes data loss in a block that contains the wordline. In other situations, such as when the leak occurs near a peripheral wordline routing area, the leak can affect the entire memory die. The storage system provided herein has a fatal wordline leak detector that determines the type of leak and, accordingly, whether just the block should be retired or whether related blocks should be retired.
    Type: Application
    Filed: July 1, 2022
    Publication date: January 4, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Xuan Tian, Liang Li, Dandan Yi, Jojo Xing, Vincent Yin, Yongke Sun, Alan Bennett