Patents by Inventor Dane J. Sievers
Dane J. Sievers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220221799Abstract: A method for photoresist-free photolithography to pattern a surface of conductor or semiconductor substrate and deposit a material includes surface cleaning and irradiating a surface through a mask with VUV photons from a lamp. Photons are generated with a VUV lamp having a wavelength of 160 nm-200 nm and with an intensity sufficient to alter the surface. The photons are directed through a mask pattern to alter the surface chemistry or structure in those areas of the substrate defined by the mask. Material is selectively deposited onto the surface, in those portions of the surface that are exposed to the VUV photons, or unexposed to the VUV photons, depending on the substrate surface. A method uses a seed film and then electroplates metal onto the seed film in the mask pattern. A method provides for electroless deposition of metal and another for altering surface chemistry in the mask pattern.Type: ApplicationFiled: May 14, 2020Publication date: July 14, 2022Inventors: J. Gary Eden, Andrey Mironov, Dane J. Sievers
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Patent number: 10748781Abstract: A method of catalyst-assisted chemical etching with a vapor-phase etchant has been developed. In one approach, a semiconductor substrate including a patterned titanium nitride layer thereon is heated, and an oxidant and an acid are evaporated to form a vapor-phase etchant comprising an oxidant vapor and an acid vapor. The semiconductor substrate and the patterned titanium nitride layer are exposed to the vapor-phase etchant during the heating of the semiconductor substrate. The vapor-phase etchant diffuses through the patterned titanium nitride layer, and titanium nitride-covered regions of the semiconductor substrate are etched. Thus, an etched semiconductor structure is formed.Type: GrantFiled: March 22, 2019Date of Patent: August 18, 2020Assignee: The Board of Trustees of the University of IllinoisInventors: Xiuling Li, Dane J. Sievers, Lukas Janavicius, Jeong Dong Kim
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Publication number: 20190221438Abstract: A method of catalyst-assisted chemical etching with a vapor-phase etchant has been developed. In one approach, a semiconductor substrate including a patterned titanium nitride layer thereon is heated, and an oxidant and an acid are evaporated to form a vapor-phase etchant comprising an oxidant vapor and an acid vapor. The semiconductor substrate and the patterned titanium nitride layer are exposed to the vapor-phase etchant during the heating of the semiconductor substrate. The vapor-phase etchant diffuses through the patterned titanium nitride layer, and titanium nitride-covered regions of the semiconductor substrate are etched. Thus, an etched semiconductor structure is formed.Type: ApplicationFiled: March 22, 2019Publication date: July 18, 2019Inventors: Xiuling Li, Dane J. Sievers, Lukas Janavicius, Jeong Dong Kim
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Patent number: 9330877Abstract: Logic devices are provided in multiple sub-collector and sub-emitter microplasma devices formed in thin and flexible, or inflexible, semiconductor materials. Logic operations are provided with one of a plurality of microplasmas forming sub-collectors with a common emitter, or a common collector plasma with a plurality of sub-emitter regions in a solid state semi-conductor pn-junction, and generating a logic output from an electrode, based upon electrode inputs to two other electrodes.Type: GrantFiled: June 1, 2015Date of Patent: May 3, 2016Assignee: The Board of Trustees of the University of IllinoisInventors: J. Gary Eden, Paul A. Tchertchian, Clark J. Wagner, Dane J. Sievers, Thomas J. Houlahan, Benben Li
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Patent number: 9263558Abstract: A hybrid plasma semiconductor device has a thin and flexible semiconductor base layer. An emitter region is diffused into the base layer forming a pn-junction. An insulator layer is upon one side the base layer and emitter region. Base and emitter electrodes are isolated from each other by the insulator layer and electrically contact the base layer and emitter region through the insulator layer. A thin and flexible collector layer is upon an opposite side of the base layer. A microcavity is formed in the collector layer and is aligned with the emitter region. Collector electrodes are arranged to sustain a microplasma within the microcavity with application of voltage to the collector electrodes. A depth of the emitter region and a thickness of the base layer are set to define a predetermined thin portion of the base layer as a base region between the emitter region and the microcavity. Microplasma generated in the microcavity serves as a collector.Type: GrantFiled: August 5, 2014Date of Patent: February 16, 2016Assignee: The Board of Trustees of the University of IllinoisInventors: J. Gary Eden, Paul A. Tchertchian, Clark J. Wagner, Dane J. Sievers, Thomas J. Houlahan, Benben Li
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Patent number: 9184341Abstract: Preferred embodiment flexible and on wafer hybrid plasma semiconductor devices have at least one active solid state semiconductor region; and a plasma generated in proximity to the active solid state semiconductor region(s). A preferred device is a hybrid plasma semiconductor device having base, emitting and microcavity collector regions formed on a single side of a device layer. Visible or ultraviolet light is emitted during operation by plasma collectors in the array. In preferred embodiments, individual PBJTs in the array serve as sub-pixels of a full-color display.Type: GrantFiled: July 14, 2014Date of Patent: November 10, 2015Assignee: The Board of Trustees of the University of IllinoisInventors: J. Gary Eden, Paul A. Tchertchian, Clark J. Wagner, Dane J. Sievers, Thomas J. Houlahan, Benben Li
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Publication number: 20150294831Abstract: Logic devices are provided in multiple sub-collector and sub-emitter microplasma devices formed in thin and flexible, or inflexible, semiconductor materials. Logic operations are provided with one of a plurality of microplasmas forming sub-collectors with a common emitter, or a common collector plasma with a plurality of sub-emitter regions in a solid state semi-conductor pn-junction, and generating a logic output from an electrode, based upon electrode inputs to two other electrodes.Type: ApplicationFiled: June 1, 2015Publication date: October 15, 2015Inventors: J. Gary Eden, Paul A. Tchertchian, Clark J. Wagner, Dane J. Sievers, Thomas J. Houlahan, Benben Li
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Publication number: 20140339677Abstract: A hybrid plasma semiconductor device has a thin and flexible semiconductor base layer. An emitter region is diffused into the base layer forming a pn-junction. An insulator layer is upon one side the base layer and emitter region. Base and emitter electrodes are isolated from each other by the insulator layer and electrically contact the base layer and emitter region through the insulator layer. A thin and flexible collector layer is upon an opposite side of the base layer. A microcavity is formed in the collector layer and is aligned with the emitter region. Collector electrodes are arranged to sustain a microplasma within the microcavity with application of voltage to the collector electrodes. A depth of the emitter region and a thickness of the base layer are set to define a predetermined thin portion of the base layer as a base region between the emitter region and the microcavity. Microplasma generated in the microcavity serves as a collector.Type: ApplicationFiled: August 5, 2014Publication date: November 20, 2014Inventors: J. Gary Eden, Paul A. Tchertchian, Clark J. Wagner, Dane J. Sievers, Thomas J. Houlahan, Benben Li
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Publication number: 20140319654Abstract: Preferred embodiment flexible and on wafer hybrid plasma semiconductor devices have at least one active solid state semiconductor region; and a plasma generated in proximity to the active solid state semiconductor region(s). A preferred device is a hybrid plasma semiconductor device having base, emitting and microcavity collector regions formed on a single side of a device layer. Visible or ultraviolet light is emitted during operation by plasma collectors in the array. In preferred embodiments, individual PBJTs in the array serve as sub-pixels of a full-color display.Type: ApplicationFiled: July 14, 2014Publication date: October 30, 2014Inventors: J. Gary Eden, Paul A. Tchertchian, Clark J. Wagner, Dane J. Sievers, Thomas J. Houlahan, Benben Li
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Patent number: 8816435Abstract: Preferred embodiment flexible and on wafer hybrid plasma semiconductor devices have at least one active solid state semiconductor region; and a plasma generated in proximity to the active solid state semiconductor region(s). Doped solid state semiconductor regions are in a thin flexible solid state substrate, and a flexible non conducting material defining a microcavity adjacent the semiconductor regions. The flexible non conducting material is bonded to the thin flexible solid state substrate, and at least one electrode is arranged with respect to said flexible substrate to generate a plasma in said microcavity, where the plasma will influence or perform a semiconducting function in cooperation with said solid state semiconductor regions. A preferred on-wafer device is formed on a single side of a silicon on insulator wafer and defines the collector (plasma cavity), emitter and base regions on a common side, which provides a simplified and easy to manufacture structure.Type: GrantFiled: July 19, 2011Date of Patent: August 26, 2014Assignee: The Board of Trustees of the University of IllinoisInventors: J. Gary Eden, Paul A. Tchertchian, Thomas J. Houlahan, Dane J. Sievers, Benben Li, Clark J. Wagner
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Publication number: 20120104554Abstract: Preferred embodiment flexible and on wafer hybrid plasma semiconductor devices have at least one active solid state semiconductor region; and a plasma generated in proximity to the active solid state semiconductor region(s). Doped solid state semiconductor regions are in a thin flexible solid state substrate, and a flexible non conducting material defining a microcavity adjacent the semiconductor regions. The flexible non conducting material is bonded to the thin flexible solid state substrate, and at least one electrode is arranged with respect to said flexible substrate to generate a plasma in said microcavity, where the plasma will influence or perform a semiconducting function in cooperation with said solid state semiconductor regions. A preferred on-wafer device is formed on a single side of a silicon on insulator wafer and defines the collector (plasma cavity), emitter and base regions on a common side, which provides a simplified and easy to manufacture structure.Type: ApplicationFiled: July 19, 2011Publication date: May 3, 2012Applicant: The Board of Trustees of the University of IllinoisInventors: J. Gary Eden, Paul A. Tchertchian, Thomas J. Houlahan, Dane J. Sievers, Benben Li, Clark J. Wagner