Patents by Inventor Daniel A. Carl
Daniel A. Carl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6677239Abstract: Methods and apparatus are provided for planarizing substrate surfaces with selective removal rates and low dishing. One aspect of the method provides for processing a substrate including providing a substrate to a polishing platen having polishing media disposed thereon, providing an abrasive free polishing composition comprising one or more surfactants to the substrate surface to modify the removal rates of the at least the first dielectric material and the second dielectric material, polishing the substrate surface, and removing the second material at a higher removal rate than the first material from a substrate surface. One aspect of the apparatus provides a system for processing substrates including a platen adapted for polishing the substrate with polishing media and a computer based controller configured to perform one aspect of the method.Type: GrantFiled: August 24, 2001Date of Patent: January 13, 2004Assignee: Applied Materials Inc.Inventors: Wei-Yung Hsu, Gopalakrishna B. Prabhu, Lizhong Sun, Daniel A. Carl
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Publication number: 20040003894Abstract: A method and apparatus is provided for depositing and planarizing a material layer on a substrate. In one embodiment, an apparatus is provided which includes a partial enclosure, a permeable disc, a diffuser plate and optionally an anode. A substrate carrier is positionable above the partial enclosure and is adapted to move a substrate into and out of contact or close proximity with the permeable disc. The partial enclosure and the substrate carrier are rotatable to provide relative motion between a substrate and the permeable disc. In another aspect, a method is provided in which a substrate is positioned in a partial enclosure having an electrolyte therein at a first distance from a permeable disc. A current is optionally applied to the surface of the substrate and a first thickness is deposited on the substrate. Next, the substrate is positioned closer to the permeable disc and a second thickness is deposited on the substrate.Type: ApplicationFiled: December 18, 2000Publication date: January 8, 2004Applicant: Applied Materials, Inc.Inventors: Wei-Yung Hsu, Liang-Yuh Chen, Ratson Morad, Daniel A. Carl, Sasson Somekh
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Publication number: 20030224678Abstract: An article and method are provided for polishing a substrate surface. In one aspect, the invention provides polishing articles including a linear strip of backing material and a fibrous polishing material disposed on the backing material. The polishing material may be in the form of individual fibers, a mesh of fibers, a web of fibers, an interwoven cloth of fibers, or felt. The polishing material may be impregnated or coated with a polishing enhancing material. The polishing article may be disposed in an apparatus for processing a substrate on a platen. In operation, a substrate is contacted with the polishing article and relative motion is provided between the substrate and the polishing article to remove material from the substrate surface.Type: ApplicationFiled: May 31, 2002Publication date: December 4, 2003Applicant: APPLIED MATERIALS, INC.Inventors: Wei-Yung Hsu, Yutao Ma, Sen-Hou Ko, Daniel A. Carl
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Publication number: 20030116427Abstract: A magnetron sputter reactor for sputtering deposition materials such as tantalum, tantalum nitride and copper, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering are promoted, either together or alternately, in the same chamber. Also, bottom coverage may be thinned or eliminated by ICP resputtering. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. ICP is provided by one or more RF coils which inductively couple RF energy into a plasma. The combined SIP-ICP layers can act as a liner or barrier or seed or nucleation layer for hole. In addition, an RF coil may be sputtered to provide protective material during ICP resputtering.Type: ApplicationFiled: July 25, 2002Publication date: June 26, 2003Applicant: Applied Materials, Inc.Inventors: Peijun Ding, Zheng Xu, Roderick C. Mosely, Suraj Rengarajan, Nirmalya Maity, Daniel A. Carl, Barry Chin, Paul F. Smith, Darryl Angelo, Anish Tolia, Jianming Fu, Fusen Chen, Praburam Gopalraja, Xianmin Tang, John C. Forster
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Publication number: 20030106490Abstract: Method and apparatus for depositing layers by atomic layer deposition. A virtual shower curtain is established between the substrate support and chamber to minimize the volume in which the reactants are distributed. A showerhead may be used to allow closer placement of the substrate thereto, further reducing the reaction volume. Zero dead space volume valves with close placement to the chamber lid and fast cycle times also improve the cycle times of the process.Type: ApplicationFiled: August 7, 2002Publication date: June 12, 2003Applicant: Applied Materials, Inc.Inventors: Ravi Jallepally, Shih-Hung Li, Alain Duboust, Jun Zhao, Liang-Yuh Chen, Daniel A. Carl
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Publication number: 20030040188Abstract: Methods and apparatus for planarizing a substrate surface are provided. In one aspect, a method is provided for planarizing a substrate surface including polishing a first conductive material to a barrier layer material, depositing a second conductive material on the first conductive material by an electrochemical deposition technique, and polishing the second conductive material and the barrier layer material to a dielectric layer. In another aspect, a processing system is provided for forming a planarized layer on a substrate, the processing system including a computer based controller configured to cause the system to polish a first conductive material to a barrier layer material, deposit a second conductive material on the first conductive material by an electrochemical deposition technique, and polish the second conductive material and the barrier layer material to a dielectric layer.Type: ApplicationFiled: August 24, 2001Publication date: February 27, 2003Applicant: Applied Materials, Inc.Inventors: Wei-Yung Hsu, Liang-Yuh Chen, Ratson Morad, Daniel A. Carl
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Publication number: 20030040182Abstract: Methods and apparatus are provided for planarizing substrate surfaces with selective removal rates and low dishing. One aspect of the method provides for processing a substrate including providing a substrate to a polishing platen having polishing media disposed thereon, providing an abrasive free polishing composition comprising one or more surfactants to the substrate surface to modify the removal rates of the at least the first dielectric material and the second dielectric material, polishing the substrate surface, and removing the second material at a higher removal rate than the first material from a substrate surface. One aspect of the apparatus provides a system for processing substrates including a platen adapted for polishing the substrate with polishing media and a computer based controller configured to perform one aspect of the method.Type: ApplicationFiled: August 24, 2001Publication date: February 27, 2003Applicant: APPLIED MATERIALS, INC.Inventors: Wei-Yung Hsu, Gopalakrishna B. Prabhu, Lizhong Sun, Daniel A. Carl
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Publication number: 20030022501Abstract: Methods and apparatus for processing substrates to improve polishing uniformity, improve planarization, remove residual material and minimize defect formation are provided. In one aspect, a method is provided for processing a substrate having a conductive material and a low dielectric constant material disposed thereon including polishing a substrate at a polishing pressures of about 2 psi or less and at platen rotational speeds of about 200 cps or greater. The polishing process may use an abrasive-containing polishing composition having up to about 1 wt. % of abrasives. The polishing process may be integrated into a multi-step polishing process.Type: ApplicationFiled: July 19, 2002Publication date: January 30, 2003Applicant: Applied Materials, Inc.Inventors: Stan D. Tsai, Liang-Yuh Chen, Lizhong Sun, Shijian Li, Feng Q. Liu, Rashid Mavliev, Ratson Morad, Daniel A. Carl
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Publication number: 20030019427Abstract: A method and apparatus for forming an in situ stabilized high concentration borophosphosilicate glass film on a semiconductor wafer or substrate. In an embodiment, the method starts by providing the substrate into a chamber. The method continues by providing a silicon source, an oxygen source, a boron source and a phosphorous source into the chamber to form a high concentration borophosphosilicate glass layer on the substrate. The method further includes reflowing the high concentration borophosphosilicate glass layer formed on the substrate.Type: ApplicationFiled: July 24, 2001Publication date: January 30, 2003Applicant: Applied Materials, Inc.Inventors: Steve Ghanayem, Daniel A. Carl, John T. Boland, Cary Ching, Zheng Yuan
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Publication number: 20030000844Abstract: One aspect of the invention provides a consistent metal electroplating technique to form void-less metal interconnects in sub-micron high aspect ratio features on semiconductor substrates. One embodiment of the invention provides a method for filling sub-micron features on a substrate, comprising reactive precleaning the substrate, depositing a barrier layer on the substrate using high density plasma physical vapor deposition; depositing a seed layer over the barrier layer using high density plasma physical vapor deposition; and electro-chemically depositing a metal using a highly resistive electrolyte and applying a first current density during a first deposition period followed by a second current density during a second period.Type: ApplicationFiled: June 26, 2002Publication date: January 2, 2003Applicant: Applied Materials, Inc.Inventors: Daniel A. Carl, Barry Chin, Liang Chen, Robin Cheung, Peijun Ding, Yezdi Dordi, Imran Hashim, Peter Hey, Ashok K. Sinha
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Publication number: 20020130049Abstract: A method and apparatus are provided for planarizing a material layer on a substrate. In one aspect, a method is provided for processing a substrate including forming a passivation layer on a substrate surface, polishing the substrate in an electrolyte solution, applying an anodic bias to the substrate surface, and removing material from at least a portion of the substrate surface. In another aspect, an apparatus is provided which includes a partial enclosure, polishing article, a cathode, a power source, a substrate carrier movably disposed above the polishing article, and a computer based controller to position a substrate in an electrolyte solution to form a passivation layer on a substrate surface, to polish the substrate in the electrolyte solution with the polishing article, and to apply an anodic bias to the substrate surface or polishing article to remove material from at least a portion of the substrate surface.Type: ApplicationFiled: January 3, 2002Publication date: September 19, 2002Inventors: Liang-Yuh Chen, Wei-Yung Hsu, Alain Duboust, Ratson Morad, Daniel A. Carl
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Publication number: 20020119286Abstract: An article of manufacture and apparatus are provided for planarizing a substrate surface. In one aspect, an article of manufacture is provided for polishing a substrate including polishing article comprising a body having at least a partially conductive surface adapted to polish the substrate and a mounting surface. A plurality of perforations may be formed in the polishing article for flow of material therethrough. In another aspect, a polishing article for polishing a substrate includes a body having a polishing surface and a conductive element disposed therein. The conductive element may have a contact surface that extends beyond a plane defined by the polishing surface. The polishing surface may have one or more pockets formed therein. The conductive element may be disposed in each of the polishing pockets.Type: ApplicationFiled: December 27, 2001Publication date: August 29, 2002Inventors: Liang-Yuh Chen, Yuchun Wang, Yan Wang, Alain Duboust, Daniel A. Carl, Ralph Wadensweiler, Manoocher Birang, Paul D. Butterfield, Rashid Mavliev, Stan D. Tsai
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Patent number: 6436267Abstract: One aspect of the invention provides a consistent metal electroplating technique to form void-less metal interconnects in sub-micron high aspect ratio features on semiconductor substrates. One embodiment of the invention provides a method for filling sub-micron features on a substrate, comprising reactive precleaning the substrate, depositing a barrier layer on the substrate using high density plasma physical vapor deposition; depositing a seed layer over the barrier layer using high density plasma physical vapor deposition; and electro-chemically depositing a metal using a highly resistive electrolyte and applying a first current density during a first deposition period followed by a second current density during a second period.Type: GrantFiled: August 29, 2000Date of Patent: August 20, 2002Assignee: Applied Materials, Inc.Inventors: Daniel A. Carl, Barry Chin, Liang Chen, Robin Cheung, Peijun Ding, Yezdi Dordi, Imran Hashim, Peter Hey, Ashok K. Sinha
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Publication number: 20020033340Abstract: An apparatus and method is provided for analyzing or conditioning an electrochemical bath. One aspect of the invention provides a method for analyzing an electrochemical bath in an electrochemical deposition process including providing a first electrochemical bath having a first bath composition, utilizing the first electrochemical bath in an electrochemical deposition process to form a second electrochemical bath having a second bath composition and analyzing the first and second compositions to identify one or more constituents generated in the electrochemical deposition process. Additive material having a composition that is substantially the same as all or at least some of the one or more constituents generated in the electrochemical deposition process may be added to another electrochemical bath to produce a desired chemical composition.Type: ApplicationFiled: June 13, 2001Publication date: March 21, 2002Inventors: Robin Cheung, Daniel A. Carl, Liang-Yuh Chen, Yezdi Dordi, Paul F. Smith, Ratson Morad, Peter Hey, Ashok Sinha
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Patent number: 6258223Abstract: The present invention discloses a system that provides for electroless deposition performed in-situ with an electroplating process to minimize oxidation and other contaminants prior to the electroplating process. The system allows the substrate to be transferred from the electroless deposition process to the electroplating process with a protective coating to also minimize oxidation. The system generally includes a mainframe having a mainframe substrate transfer robot, a loading station disposed in connection with the mainframe, one or more processing facilities disposed in connection with the mainframe, an electroless supply fluidly connected to the one or more processing applicators and optionally includes a spin-rinse-dry (SRD) station, a rapid thermal anneal chamber and a system controller for controlling the deposition processes and the components of the electro-chemical deposition system.Type: GrantFiled: July 9, 1999Date of Patent: July 10, 2001Assignee: Applied Materials, Inc.Inventors: Robin Cheung, Daniel A. Carl, Yezdi Dordi, Peter Hey, Ratson Morad, Liang-Yuh Chen, Paul F. Smith, Ashok K. Sinha
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Patent number: 5672537Abstract: Polysilicon (20) in a trench (21) is etched at an angle to produce a conductor within the trench that has shape characteristics which approximate the shadow of the side wall (26) of the trench (21) closest the beam source. Specifically, when the first side wall (26) is closest the beam source and the second side wall (27) is furthest from the beam source, the polysilicon on the first side wall (26) is almost as high as the first side wall (26), while the polysilicon on the more exposed side wall (27) is considerably lower than the first side wall (26) and approximates the shadow of the first side wall (26) on the second side wall (27) relative to the beam.Type: GrantFiled: September 17, 1996Date of Patent: September 30, 1997Assignee: International Business Machines CorporationInventors: Daniel A. Carl, Donald M. Kenney, Walter E. Mlynko, Son Van Nguyen
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Patent number: 5610441Abstract: Polysilicon in a trench is etched at an angle to produce a conductor within the trench that has shape characteristics which approximate the shadow of the side wall of the trench closest the beam source. Specifically, when the first side wall is closest to the beam source and the second side wall is furthest from the beam source, the polysilicon on the first side wall is almost as high as the first side wall, while the polysilicon on the more exposed side wall is considerably lower than the first side wall and approximates the shadow of the first side wall on the second side wall relative to the beam. The polysilicon in the trench may be in the shape of a solid angled block approximating the shadow line from the top of side wall to the shadow line on side wall however, it is preferred that the polysilicon take the form of a conformal layer in trench prior to etching such that the polysilicon ultimately has an angled "U" shape which approximates the shadow line.Type: GrantFiled: May 19, 1995Date of Patent: March 11, 1997Assignee: International Business Machines CorporationInventors: Daniel A. Carl, Donald M. Kenney, Walter E. Mlynko, Son V. Nguyen
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Patent number: 5466626Abstract: The subject invention provides a method of forming recesses in a substrate such as a capacitor so as to increase the surface area thereof and therefore the charge storage capacity of the capacitor. This is accomplished by utilizing a micro mask formed by agglomeration on the surface of the substrate. The agglomerated material, such as gold, titanium nitride or titanium silicide, is used as a mask for selectively etching the substrate to form recesses therein. Alternatively, an oxide transfer mask can be utilized with the agglomerated material micro mask to etch the substrate.Type: GrantFiled: December 16, 1993Date of Patent: November 14, 1995Assignee: International Business Machines CorporationInventors: Michael Armacost, A. Richard Baker, Jr., Wayne S. Berry, Daniel A. Carl, Donald M. Kenney, Thomas J. Licata