Patents by Inventor Daniel A. Cohen
Daniel A. Cohen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12046695Abstract: A method of removing a substrate, comprising: forming a growth restrict mask with a plurality of striped opening areas directly or indirectly upon a GaN-based substrate; and growing a plurality of semiconductor layers upon the GaN-based substrate using the growth restrict mask, such that the growth extends in a direction parallel to the striped opening areas of the growth restrict mask, and growth is stopped before the semiconductor layers coalesce, thereby resulting in island-like semiconductor layers. A device is processed for each of the island-like semiconductor layers. Etching is performed until at least a part of the growth restrict mask is exposed. The devices are then bonded to a support substrate. The GaN-based substrate is removed from the devices by a wet etching technique that at least partially dissolves the growth restrict mask. The GaN substrate that is removed then can be recycled.Type: GrantFiled: May 7, 2018Date of Patent: July 23, 2024Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Takeshi Kamikawa, Srinivas Gandrothula, Hongjian Li, Daniel A. Cohen
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Publication number: 20230006426Abstract: A Group-III nitride light emitting device that utilizes scattering of hot carriers generated by Auger recombination from an externally electrically-driven, relatively narrow band gap carrier generation region into a relatively wide band gap carrier recombination region, such that the relatively wide band gap carrier recombination region of the Group-III nitride light emitting device is internally electrically injected by the hot carriers generated in the externally electrically-injected relatively narrow band gap carrier generation region. The device is used for generation of incoherent light (a light-emitting diode) or coherent light (a laser diode).Type: ApplicationFiled: February 17, 2021Publication date: January 5, 2023Applicant: The Regents of the University of CaliforniaInventors: Daniel A. Cohen, Daniel Myers, Claude C. A. Weisbuch, Steven P. DenBaars
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Publication number: 20220352410Abstract: A method of removing a substrate, comprising: forming a growth restrict mask with a plurality of striped opening areas directly or indirectly upon a GaN-based substrate; and growing a plurality of semiconductor layers upon the GaN-based substrate using the growth restrict mask, such that the growth extends in a direction parallel to the striped opening areas of the growth restrict mask, and growth is stopped before the semiconductor layers coalesce, thereby resulting in island-like semiconductor layers. A device is processed for each of the island-like semiconductor layers. Etching is performed until at least a part of the growth restrict mask is exposed. The devices are then bonded to a support substrate. The GaN-based substrate is removed from the devices by a wet etching technique that at least partially dissolves the growth restrict mask. The GaN substrate that is removed then can be recycled.Type: ApplicationFiled: July 12, 2022Publication date: November 3, 2022Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Takeshi Kamikawa, Srinivas Gandrothula, Hongjian Li, Daniel A. Cohen
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Publication number: 20220352409Abstract: A method of removing a substrate, comprising: forming a growth restrict mask with a plurality of striped opening areas directly or indirectly upon a GaN-based substrate; and growing a plurality of semiconductor layers upon the GaN-based substrate using the growth restrict mask, such that the growth extends in a direction parallel to the striped opening areas of the growth restrict mask, and growth is stopped before the semiconductor layers coalesce, thereby resulting in island-like semiconductor layers. A device is processed for each of the island-like semiconductor layers. Etching is performed until at least a part of the growth restrict mask is exposed. The devices are then bonded to a support substrate. The GaN-based substrate is removed from the devices by a wet etching technique that at least partially dissolves the growth restrict mask. The GaN substrate that is removed then can be recycled.Type: ApplicationFiled: July 12, 2022Publication date: November 3, 2022Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Takeshi Kamikawa, Srinivas Gandrothula, Hongjian Li, Daniel A. Cohen
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Publication number: 20220239068Abstract: Vertical Cavity Surface Emitting Laser (VCSEL) configurations are disclosed. In a first example, the VCSEL includes a III-Nitride active region between a p-type III-Nitride layer and an n-type III-Nitride layer; and a curved minor on or above the p-type III-Nitride layer. The curved mirror can be formed in a III-Nitride layer or a Transparent Oxide (TO) material and enables the formation of a long VCSEL cavity that improves VCSEL lifetime, VCSEL output power, VCSEL power efficiency and VCSEL reliability. In a second example, the VCSEL has an active region with a high indium content. In a third example, the VCSEL is transparent.Type: ApplicationFiled: May 28, 2020Publication date: July 28, 2022Applicant: The Regents of the University of CaliforniaInventors: Jared Kearns, Daniel A. Cohen, Joonho Back, Nathan Palmquist, Tal Margalith, Steven P. DenBaars, Shuji Nakamura
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Publication number: 20200194615Abstract: A method of removing a substrate, comprising: forming a growth restrict mask with a plurality of striped opening areas directly or indirectly upon a GaN-based substrate; and growing a plurality of semiconductor layers upon the GaN-based substrate using the growth restrict mask, such that the growth extends in a direction parallel to the striped opening areas of the growth restrict mask, and growth is stopped before the semiconductor layers coalesce, thereby resulting in island-like semiconductor layers. A device is processed for each of the island-like semiconductor layers. Etching is performed until at least a part of the growth restrict mask is exposed. The devices are then bonded to a support substrate. The GaN-based substrate is removed from the devices by a wet etching technique that at least partially dissolves the growth restrict mask. The GaN substrate that is removed then can be recycled.Type: ApplicationFiled: May 7, 2018Publication date: June 18, 2020Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Takeshi Kamikawa, Srinivas Gandrothula, Hongjian Li, Daniel A. Cohen
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Patent number: 9619597Abstract: The present disclosure relates to a computer-implemented method for electronic design verification. Embodiments may include providing an electronic design including, at least in part, one or more hardware description languages and one or more software programming languages. Embodiments may further include calculating configuration information without analyzing the electronic design, wherein the configuration information includes one or more memory elements configured to control a mode of operation of the electronic design. Embodiments may also include determining a change in the one or more memory elements and altering a function associated with the electronic design verification based upon, at least in part, the determined change.Type: GrantFiled: March 24, 2014Date of Patent: April 11, 2017Assignee: Cadence Design Systems, Inc.Inventors: Adam D. Sherer, Daniel A. Cohen, John LeRoy Pierce
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Patent number: 9202004Abstract: The present disclosure relates to a computer-implemented method for electronic design verification. Embodiments may include providing an electronic design including, at least in part, one or more hardware description languages and one or more software programming languages. Embodiment may also include calculating, using one or more processors, configuration information without analyzing the electronic design, wherein the configuration information includes one or more memory elements configured to control a mode of operation of the electronic design. Embodiments may further include storing a seed for each configuration, wherein each seed may be configured to cause a constraint solver to set a defined set of values for one or more random variables in a class associated with the seed.Type: GrantFiled: August 1, 2014Date of Patent: December 1, 2015Assignee: Cadence Design Systems, Inc.Inventors: Daniel A. Cohen, John LeRoy Pierce, Nir Weiss
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Patent number: 9054498Abstract: A method of fabricating an (Al,Ga,In)N laser diode, comprising depositing one or more III-N layers upon a growth substrate at a first temperature, depositing an indium containing laser core at a second temperature upon layers deposited at a first temperature, and performing all subsequent fabrication steps under conditions that inhibit degradation of the laser core, wherein the conditions are a substantially lower temperature than the second temperature.Type: GrantFiled: June 18, 2014Date of Patent: June 9, 2015Assignee: The Regents of the University of CaliforniaInventors: Daniel A. Cohen, Steven P. DenBaars, Shuji Nakamura
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Patent number: 9040327Abstract: A method for fabricating AlxGa1-xN-cladding-free nonpolar III-nitride based laser diodes or light emitting diodes. Due to the absence of polarization fields in the nonpolar crystal planes, these nonpolar devices have thick quantum wells that function as an optical waveguide to effectively confine the optical mode to the active region and eliminate the need for Al-containing waveguide cladding layers.Type: GrantFiled: June 13, 2012Date of Patent: May 26, 2015Assignee: The Regents of the University of CaliforniaInventors: Daniel F. Feezell, Mathew C. Schmidt, Kwang-Choong Kim, Robert M. Farrell, Daniel A. Cohen, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Publication number: 20140301419Abstract: A method of fabricating an (Al,Ga,In)N laser diode, comprising depositing one or more III-N layers upon a growth substrate at a first temperature, depositing an indium containing laser core at a second temperature upon layers deposited at a first temperature, and performing all subsequent fabrication steps under conditions that inhibit degradation of the laser core, wherein the conditions are a substantially lower temperature than the second temperature.Type: ApplicationFiled: June 18, 2014Publication date: October 9, 2014Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Daniel A. Cohen, Steven P. DenBaars, Shuji Nakamura
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Patent number: 8790943Abstract: A method of fabricating an (Al,Ga,In)N laser diode, comprising depositing one or more III-N layers upon a growth substrate at a first temperature, depositing an indium containing laser core at a second temperature upon layers deposited at a first temperature, and performing all subsequent fabrication steps under conditions that inhibit degradation of the laser core, wherein the conditions are a substantially lower temperature than the second temperature.Type: GrantFiled: August 23, 2012Date of Patent: July 29, 2014Assignee: The Regents of the University of CaliforniaInventors: Daniel A. Cohen, Steven P. DenBaars, Shuji Nakamura
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Publication number: 20130215921Abstract: A method of fabricating an (Al,Ga,In)N laser diode, comprising depositing one or more III-N layers upon a growth substrate at a first temperature, depositing an indium containing laser core at a second temperature upon layers deposited at a first temperature, and performing all subsequent fabrication steps under conditions that inhibit degradation of the laser core, wherein the conditions are a substantially lower temperature than the second temperature.Type: ApplicationFiled: August 23, 2012Publication date: August 22, 2013Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Daniel A. Cohen, Steven P. DenBaars, Shuji Nakamura
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Publication number: 20120256158Abstract: A method for fabricating AlxGa1-xN-cladding-free nonpolar III-nitride based laser diodes or light emitting diodes. Due to the absence of polarization fields in the nonpolar crystal planes, these nonpolar devices have thick quantum wells that function as an optical waveguide to effectively confine the optical mode to the active region and eliminate the need for Al-containing waveguide cladding layers.Type: ApplicationFiled: June 13, 2012Publication date: October 11, 2012Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Daniel F. Feezell, Mathew C. Schmidt, Kwang Choong Kim, Robert M. Farrell, Daniel A. Cohen, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Patent number: 8254423Abstract: A method of fabricating an (Al,Ga,In)N laser diode, comprising depositing one or more III-N layers upon a growth substrate at a first temperature, depositing an indium containing laser core at a second temperature upon layers deposited at a first temperature, and performing all subsequent fabrication steps under conditions that inhibit degradation of the laser core, wherein the conditions are a substantially lower temperature than the second temperature.Type: GrantFiled: June 1, 2009Date of Patent: August 28, 2012Assignee: The Regents of the University of CaliforniaInventors: Daniel A. Cohen, Steven P. DenBaars, Shuji Nakamura
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Patent number: 8211723Abstract: A method for fabricating AlxGa1-xN-cladding-free nonpolar III-nitride based laser diodes or light emitting diodes. Due to the absence of polarization fields in the nonpolar crystal planes, these nonpolar devices have thick quantum wells that function as an optical waveguide to effectively confine the optical mode to the active region and eliminate the need for Al-containing waveguide cladding layers.Type: GrantFiled: February 12, 2008Date of Patent: July 3, 2012Assignee: The Regents of the University of CaliforniaInventors: Daniel F. Feezell, Mathew C. Schmidt, Kwang-Choong Kim, Robert M. Farrell, Daniel A. Cohen, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Publication number: 20100142576Abstract: A method of fabricating an (Al,Ga,In)N laser diode, comprising depositing one or more III-N layers upon a growth substrate at a first temperature, depositing an indium containing laser core at a second temperature upon layers deposited at a first temperature, and performing all subsequent fabrication steps under conditions that inhibit degradation of the laser core, wherein the conditions are a substantially lower temperature than the second temperature.Type: ApplicationFiled: June 1, 2009Publication date: June 10, 2010Applicant: The Regents of the University of CaliforniaInventors: Daniel A. Cohen, Steven P. DenBaars, Shuji Nakamura
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Patent number: 7480322Abstract: A vertical-cavity surface-emitting laser (VCSEL) comprising a low-loss thin metal contact and current spreading layer within the optical cavity that provides for improved ohmic contact and lateral current distribution, a substrate including a plano-concave optical cavity, a (Ga,In,Al)N multiple quantum well (MQW) active region contained within the optical cavity that generates light when injected by an electrical current, and an integrated micromirror fabricated onto the substrate that provides for optical mode control of the light generated by the active region. A relatively simple process is used to fabricate the VCSEL.Type: GrantFiled: May 15, 2007Date of Patent: January 20, 2009Assignee: The Regents of the University of CaliforniaInventors: Daniel F. Feezell, Daniel A. Cohen, Robert M. Farrell, Masahiro Ishida, Shuji Nakamura
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Publication number: 20080191192Abstract: A method for fabricating AlxGa1-xN-cladding-free nonpolar III-nitride based laser diodes or light emitting diodes. Due to the absence of polarization fields in the nonpolar crystal planes, these nonpolar devices have thick quantum wells that function as an optical waveguide to effectively confine the optical mode to the active region and eliminate the need for Al-containing waveguide cladding layers.Type: ApplicationFiled: February 12, 2008Publication date: August 14, 2008Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Daniel F. Feezell, Matthew C. Schmidt, Kwang Choong Kim, Robert M. Farrell, Daniel A. Cohen, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Patent number: D581139Type: GrantFiled: September 28, 2006Date of Patent: November 25, 2008Assignees: Zona Enterprises Inc., Little Big MouthInventor: Daniel A. Cohen