Patents by Inventor Daniel A. Corliss

Daniel A. Corliss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10553522
    Abstract: A semiconductor microcooler is fabricated by forming fins in a semiconductor substrate and forming a metal layer upon the fins. A stacked microcooler may be formed by stacking a plurality of semiconductor microcoolers. The microcoolers may be positioned such that the fins of each microcooler are aligned. One or more microcoolers may be thermally connected to a surface of a coolant conduit that is thermally connected to an electronic device heat generating device, such as an integrated circuit (IC) chip, or the like. Heat from the electronic device heat generating device may transfer to the one or more microcoolers. A flow of cooled liquid may be introduced through the conduit and heat from the one or more microcoolers may transfer to the liquid coolant.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: February 4, 2020
    Assignee: International Business Machines Corporation
    Inventors: Donald F. Canaperi, Daniel A. Corliss, Dario Goldfarb, Dinesh Gupta, Fee Li Lie, Kamal K. Sikka
  • Patent number: 10490481
    Abstract: Techniques that facilitate a copper microcooler structure are provided. In one example, a device includes a first copper microcooler structure and a second copper microcooler structure. The first copper microcooler structure includes a first copper plate and a first set of copper channels attached to the first copper plate. The second copper microcooler structure includes a second copper plate and a second set of copper channels attached to the second copper plate. A surface of the second copper plate associated with the second copper microcooler structure is bonded to one or more surfaces of the first set of copper channels associated with the first copper microcooler structure via a fusion bond.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: November 26, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Fee Li Lie, Kamal K. Sikka, Donald Francis Canaperi, Daniel A. Corliss, Dinesh Gupta, Dario Goldfarb
  • Patent number: 10490480
    Abstract: Techniques that facilitate a copper microcooler structure are provided. In one example, a device includes a first copper microcooler structure and a second copper microcooler structure. The first copper microcooler structure includes a first copper plate and a first set of copper channels attached to the first copper plate. The second copper microcooler structure includes a second copper plate and a second set of copper channels attached to the second copper plate. A surface of the second copper plate associated with the second copper microcooler structure is bonded to one or more surfaces of the first set of copper channels associated with the first copper microcooler structure via a fusion bond.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: November 26, 2019
    Assignee: International Business Machines Corporation
    Inventors: Fee Li Lie, Kamal K. Sikka, Donald Francis Canaperi, Daniel A. Corliss, Dinesh Gupta, Dario Goldfarb
  • Publication number: 20190346773
    Abstract: An embodiment of the invention may include a semiconductor structure for ensuring semiconductor design integrity. The semiconductor structure may include an electrical circuit necessary for the operation of the semiconductor circuit and white space having no electrical circuit. The semiconductor structure may include an optical pattern used for validating the semiconductor circuit design formed in the white space of the electrical circuit. In an embodiment of the invention, the optical pattern may include one or more deposition layers. In an embodiment of the invention, the optical pattern may include covershapes. In an embodiment of the invention, the optical pattern may be physically isolated from the electrical circuit. The optical pattern may include a Moiré pattern.
    Type: Application
    Filed: July 26, 2019
    Publication date: November 14, 2019
    Inventors: Daniel Corliss, Derren N. Dunn, Michael A. Guillorn, Shawn P. Fetterolf
  • Patent number: 10429743
    Abstract: An embodiment of the invention may include a method for ensuring semiconductor design integrity. The method may include analyzing a photomask design for a semiconductor circuit. The photomask may include an electrical design necessary for the operation of the semiconductor circuit, and white space, which has no electrical design. The method may include inserting an optical design into the white space of the photomask design for the semiconductor circuit. The optical design may have known optical patterns for validating the semiconductor circuit design. In an embodiment of the invention, the optical design may be physically isolated from the electrical design. In another embodiment of the invention, the optical design may comprise one or more photomask layers and overlay the electrical design. In another embodiment of the invention, the optical design may comprise covershapes.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: October 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Daniel Corliss, Derren N. Dunn, Michael A. Guillorn, Shawn P. Fetterolf
  • Publication number: 20190267234
    Abstract: A lithographic patterning method includes forming a multi-layer patterning material film stack on a semiconductor substrate, the patterning material film stack including a resist layer formed over one or more additional layers, and forming a metal-containing top coat over the resist layer. The method further includes exposing the multi-layer patterning material film stack to patterning radiation through the metal-containing top coat to form a desired pattern in the resist layer, removing the metal-containing top coat, developing the pattern formed in the resist layer, etching at least one underlying layer in accordance with the developed pattern, and removing remaining portions of the resist layer. The metal-containing top coat can be formed, for example, by atomic layer deposition or spin-on deposition over the resist layer, or by self-segregation from the resist layer.
    Type: Application
    Filed: May 6, 2019
    Publication date: August 29, 2019
    Inventors: Ekmini Anuja De Silva, Dario Goldfarb, Nelson Felix, Daniel Corliss, Rudy J. Wojtecki
  • Publication number: 20190259601
    Abstract: A semiconductor structure includes a semiconductor substrate and a multi-layer patterning material film stack formed on the semiconductor substrate. The patterning material film stack includes a resist layer formed over one or more additional layers. The semiconductor structure further includes a metal-containing top coat formed over the resist layer. The metal-containing top coat can be formed, for example, by atomic layer deposition or spin-on deposition over the resist layer, or by self-segregation from the resist layer.
    Type: Application
    Filed: May 6, 2019
    Publication date: August 22, 2019
    Inventors: Ekmini Anuja De Silva, Dario Goldfarb, Nelson Felix, Daniel Corliss, Rudy J. Wojtecki
  • Patent number: 10347486
    Abstract: A lithographic patterning method includes forming a multi-layer patterning material film stack on a semiconductor substrate, the patterning material film stack including a resist layer formed over one or more additional layers, and forming a metal-containing top coat over the resist layer. The method further includes exposing the multi-layer patterning material film stack to patterning radiation through the metal-containing top coat to form a desired pattern in the resist layer, removing the metal-containing top coat, developing the pattern formed in the resist layer, etching at least one underlying layer in accordance with the developed pattern, and removing remaining portions of the resist layer. The metal-containing top coat can be formed, for example, by atomic layer deposition or spin-on deposition over the resist layer, or by self-segregation from the resist layer.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: July 9, 2019
    Assignee: International Business Machines Corporation
    Inventors: Ekmini Anuja De Silva, Dario Goldfarb, Nelson Felix, Daniel Corliss, Rudy J. Wojtecki
  • Publication number: 20190189428
    Abstract: A lithographic patterning method includes forming a multi-layer patterning material film stack on a semiconductor substrate, the patterning material film stack including a resist layer formed over one or more additional layers, and forming a metal-containing top coat over the resist layer. The method further includes exposing the multi-layer patterning material film stack to patterning radiation through the metal-containing top coat to form a desired pattern in the resist layer, removing the metal-containing top coat, developing the pattern formed in the resist layer, etching at least one underlying layer in accordance with the developed pattern, and removing remaining portions of the resist layer. The metal-containing top coat can be formed, for example, by atomic layer deposition or spin-on deposition over the resist layer, or by self-segregation from the resist layer.
    Type: Application
    Filed: December 19, 2017
    Publication date: June 20, 2019
    Inventors: Ekmini Anuja De Silva, Dario Goldfarb, Nelson Felix, Daniel Corliss, Rudy J. Wojtecki
  • Publication number: 20190163071
    Abstract: An embodiment of the invention may include a method for ensuring semiconductor design integrity. The method may include analyzing a photomask design for a semiconductor circuit. The photomask may include an electrical design necessary for the operation of the semiconductor circuit, and white space, which has no electrical design. The method may include inserting an optical design into the white space of the photomask design for the semiconductor circuit. The optical design may have known optical patterns for validating the semiconductor circuit design. In an embodiment of the invention, the optical design may be physically isolated from the electrical design. In another embodiment of the invention, the optical design may comprise one or more photomask layers and overlay the electrical design. In another embodiment of the invention, the optical design may comprise covershapes.
    Type: Application
    Filed: November 30, 2017
    Publication date: May 30, 2019
    Inventors: Daniel Corliss, Derren N. Dunn, Michael A. Guillorn, Shawn P. Fetterolf
  • Publication number: 20190163857
    Abstract: An embodiment of the invention may include a method for ensuring semiconductor design integrity. The method may include analyzing a photomask design for a semiconductor circuit. The photomask may include a primary electrical design necessary for the operation of the semiconductor circuit, and white space, which has no primary electrical design. The method may include inserting a secondary electrical design into the white space of the photomask design for the semiconductor circuit. The secondary electrical design may have known electrical properties for validating the semiconductor circuit design.
    Type: Application
    Filed: November 30, 2017
    Publication date: May 30, 2019
    Inventors: Daniel Corliss, Derren N. Dunn, Michael A. Guillorn, Shawn P. Fetterolf
  • Patent number: 10281826
    Abstract: Embodiments are directed to a method and system for determining effective dose of a lithography tool. The method includes performing a series of open frame exposures with the lithography tool on a substrate to produce a set of controlled exposure dose blocks in resist, and then baking and developing the exposed substrate. The method further includes scanning the resultant open frame images with oblique light and capturing the light scattered from the substrate surface. The method further includes creating a haze map from the background signal of the scattered light data, converting the haze map to a graphical image file, and analyzing the graphical image file to determine effective dose of the lithography tool, wherein a brightness of the graphical image file is related to effective dose of the lithography tool.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: May 7, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Daniel A. Corliss, Luciana Meli Thompson, Christopher F. Robinson
  • Patent number: 10274836
    Abstract: Embodiments are directed to a method and system for determining effective dose of a lithography tool. The method includes performing a series of open frame exposures with the lithography tool on a substrate to produce a set of controlled exposure dose blocks in resist, and then baking and developing the exposed substrate. The method further includes scanning the resultant open frame images with oblique light and capturing the light scattered from the substrate surface. The method further includes creating a haze map from the background signal of the scattered light data, converting the haze map to a graphical image file, and analyzing the graphical image file to determine effective dose of the lithography tool, wherein a brightness of the graphical image file is related to effective dose of the lithography tool.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: April 30, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Daniel A. Corliss, Luciana Meli Thompson, Christopher F. Robinson
  • Publication number: 20180373164
    Abstract: Embodiments are directed to a method and system for determining effective dose of a lithography tool. The method includes performing a series of open frame exposures with the lithography tool on a substrate to produce a set of controlled exposure dose blocks in resist, and then baking and developing the exposed substrate. The method further includes scanning the resultant open frame images with oblique light and capturing the light scattered from the substrate surface. The method further includes creating a haze map from the background signal of the scattered light data, converting the haze map to a graphical image file, and analyzing the graphical image file to determine effective dose of the lithography tool, wherein a brightness of the graphical image file is related to effective dose of the lithography tool.
    Type: Application
    Filed: June 23, 2017
    Publication date: December 27, 2018
    Inventors: DANIEL A. CORLISS, LUCIANA MELI THOMPSON, CHRISTOPHER F. ROBINSON
  • Publication number: 20180373165
    Abstract: Embodiments are directed to a method and system for determining effective dose of a lithography tool. The method includes performing a series of open frame exposures with the lithography tool on a substrate to produce a set of controlled exposure dose blocks in resist, and then baking and developing the exposed substrate. The method further includes scanning the resultant open frame images with oblique light and capturing the light scattered from the substrate surface. The method further includes creating a haze map from the background signal of the scattered light data, converting the haze map to a graphical image file, and analyzing the graphical image file to determine effective dose of the lithography tool, wherein a brightness of the graphical image file is related to effective dose of the lithography tool.
    Type: Application
    Filed: November 27, 2017
    Publication date: December 27, 2018
    Inventors: DANIEL A. CORLISS, LUCIANA MELI THOMPSON, CHRISTOPHER F. ROBINSON
  • Patent number: 9709898
    Abstract: An electrical field is applied through an extreme ultraviolet (EUV) photoresist layer along a direction perpendicular to an interface between the EUV photoresist layer and an underlying layer. Secondary electrons and thermal electrons are accelerated along the direction of the electrical field, and travel with directionality before interacting with the photoresist material for a chemical reaction. The directionality increases the efficiency of electron photoacid capture, reducing the required EUV dose for exposure. Furthermore, this directionality reduces lateral diffusion of the secondary and thermal electrons, and thereby reduces blurring of the image and improves the image resolution of feature edges formed in the EUV photoresist layer. The electrical field may be generated by applying a direct current (DC) and/or alternating current (AC) bias voltage across an electrostatic chuck and a conductive plate placed over the EUV photoresist layer with a hole for passing the EUV radiation through.
    Type: Grant
    Filed: October 23, 2014
    Date of Patent: July 18, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Richard S. Wise, Daniel A. Corliss
  • Patent number: 9451684
    Abstract: An extreme ultraviolet (EUV) radiation source pellet includes at least one metal particle embedded within a heavy noble gas cluster contained within a noble gas shell cluster. The EUV radiation source assembly can be activated by a sequential irradiation of at least one first laser pulse and at least one second laser pulse. Each first laser pulse generates plasma by detaching outer orbital electrons from the at least one metal particle and releasing the electrons into the heavy noble gas cluster. Each second laser pulse amplifies the plasma embedded in the heavy noble gas cluster triggering a laser-driven self-amplifying process. The amplified plasma induces inter-orbital electron transitions in heavy noble gas and other constitute atoms leading to emission of EUV radiation. The laser pulsing units can be combined with a source pellet generation unit to form an integrated EUV source system.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: September 20, 2016
    Assignee: International Business Machines Corporation
    Inventors: Daniel A. Corliss, Sadanand V. Deshpande, Veeresh V. Deshpande, Oleg Gluschenkov, Sivarama Krishnan
  • Publication number: 20160205757
    Abstract: An extreme ultraviolet (EUV) radiation source pellet includes at least one metal particle embedded within a heavy noble gas cluster contained within a noble gas shell cluster. The EUV radiation source assembly can be activated by a sequential irradiation of at least one first laser pulse and at least one second laser pulse. Each first laser pulse generates plasma by detaching outer orbital electrons from the at least one metal particle and releasing the electrons into the heavy noble gas cluster. Each second laser pulse amplifies the plasma embedded in the heavy noble gas cluster triggering a laser-driven self-amplifying process. The amplified plasma induces inter-orbital electron transitions in heavy noble gas and other constitute atoms leading to emission of EUV radiation. The laser pulsing units can be combined with a source pellet generation unit to form an integrated EUV source system.
    Type: Application
    Filed: March 22, 2016
    Publication date: July 14, 2016
    Inventors: Daniel A. Corliss, Sadanand V. Deshpande, Veeresh V. Deshpande, Oleg Gluschenkov, Sivarama Krishnan
  • Patent number: 9301381
    Abstract: An extreme ultraviolet (EUV) radiation source pellet includes at least one metal particle embedded within a heavy noble gas cluster contained within a noble gas shell cluster. The EUV radiation source assembly can be activated by a sequential irradiation of at least one first laser pulse and at least one second laser pulse. Each first laser pulse generates plasma by detaching outer orbital electrons from the at least one metal particle and releasing the electrons into the heavy noble gas cluster. Each second laser pulse amplifies the plasma embedded in the heavy noble gas cluster triggering a laser-driven self-amplifying process. The amplified plasma induces inter-orbital electron transitions in heavy noble gas and other constitute atoms leading to emission of EUV radiation. The laser pulsing units can be combined with a source pellet generation unit to form an integrated EUV source system.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: March 29, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Daniel A. Corliss, Sadanand V. Deshpande, Veeresh V. Deshpande, Oleg Gluschenkov, Sivarama Krishnan
  • Publication number: 20160081174
    Abstract: An extreme ultraviolet (EUV) radiation source pellet includes at least one metal particle embedded within a heavy noble gas cluster contained within a noble gas shell cluster. The EUV radiation source assembly can be activated by a sequential irradiation of at least one first laser pulse and at least one second laser pulse. Each first laser pulse generates plasma by detaching outer orbital electrons from the at least one metal particle and releasing the electrons into the heavy noble gas cluster. Each second laser pulse amplifies the plasma embedded in the heavy noble gas cluster triggering a laser-driven self-amplifying process. The amplified plasma induces inter-orbital electron transitions in heavy noble gas and other constitute atoms leading to emission of EUV radiation. The laser pulsing units can be combined with a source pellet generation unit to form an integrated EUV source system.
    Type: Application
    Filed: September 12, 2014
    Publication date: March 17, 2016
    Inventors: Daniel A. Corliss, Sadanand V. Deshpande, Veeresh V. Deshpande, Oleg Gluschenkov, Sivarama Krishnan