Patents by Inventor Daniel A. Jochym

Daniel A. Jochym has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7508683
    Abstract: Methods and apparatus for providing electromagnetic interference (EMI) shielding for a module receiving area within a computer server housing configured to receive an input/output (IO) module are disclosed. The module receiving area is covered with a door. EMI shielding is provided by transitioning the door from a closed position to an open position in response to a force applied by the IO module, maintaining contact between the IO module and the door while the door is open to provide EMI shielding for the module receiving area when the IO module is present, and transitioning the door from the open position to the closed position in response to removal of the force applied by the IO module when the IO module is withdrawn from the module receiving area to provide EMI shielding for the module receiving area when the IO module is not present.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: March 24, 2009
    Assignee: Unisys Corporation
    Inventors: Daniel A. Jochym, Joseph J. Scorsone
  • Patent number: 7394652
    Abstract: Card adapter modules and methods for connecting peripheral cards to computing systems are disclosed. The card adapter modules each include a card connector, a peripheral connector, and a housing that supports the card connector and peripheral connector. A peripheral card is connected to a computing system having a chassis with an input/output slot by inserting the peripheral card along a first insertion axis (y-axis) into a card connector of a card adapter module and inserting the card adapter module along a second insertion axis (x-axis) extending through the input/output slot to a platform connector of a computing platform within the computing system. The card connector is electrically connected to the peripheral connector.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: July 1, 2008
    Assignee: Unisys Corporation
    Inventors: Daniel A. Jochym, Sean M. McClain, Mark W. Wessel, Kenneth J. Neeld, Keith D. Mease
  • Patent number: 7281953
    Abstract: Methods and apparatus to configure a computer to receive cards of a first or second card type are disclosed. The computer is configured through the use of an adapter including a flexible cable having a first connector adjacent one end and a second connector adjacent the other end. The computer is configured by coupling the first connector to the computer. Also, a determination is made to receive either the first or the second card types. For a determination to receive the first card type, the flexible cable is bent in a predefined manner to orient the second connector with respect to the first connector to receive the first card type. For a determination to receive the second card type, the flexible cable is bent in another predefined manner to orient the second connector differently with respect to the first connector to receive the second card type.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: October 16, 2007
    Assignee: Unisys Corporation
    Inventors: Daniel A. Jochym, Joseph J. Scorsone
  • Patent number: 7079386
    Abstract: A computer system is provided with a rack defining an interior. A computer chassis is mounted at least partially within the interior of the rack, wherein the computer chassis defines an interior. An interconnect assembly is mounted at least partially within the interior of the rack, wherein the interconnect assembly has an interconnect connector. A processor assembly is mounted at least partially within the interior of the computer chassis, and the processor assembly has a processor board and a processor connector mounted to the processor board and connected to the interconnect connector of the interconnect assembly. The processor assembly also has at least eight addressable processor segments mounted to the processor board.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: July 18, 2006
    Assignee: Unisys Corporation
    Inventors: Daniel A. Jochym, Christian E. Shenberger, Keith D. Mease, Joseph J. Scorsone
  • Patent number: 7040013
    Abstract: A method, system, and product for routing nets along a printed circuit board through an obstacle field and a circuit board having traces produced in accordance with the routed nets is disclosed. The nets are routed by identifying a general path for each of a pair of nets between adjacent rows of obstacles within an obstacle field, selectively lengthening at least one of the nets by shifting at least one portion of the net toward a position between adjacent pads in one of the rows, thereby increasing the length of the net, and selectively increasing the mean spacing between the pair of nets by shifting at least one portion of at least one net of the pair away from the other net of the pair toward a position between adjacent pads in one of the rows, thereby reducing cross-talk between the nets.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: May 9, 2006
    Assignee: Unisys Corporation
    Inventors: Daniel A. Jochym, Christian E. Shenberger, Robert Fix
  • Patent number: 6992894
    Abstract: An apparatus and method are provided for dissipating heat from an electronic component mounted in a conductive enclosure and for shielding electromagnetic radiation generated by the electronic component. A heat sink is configured to be mounted in thermal contact with the electronic component. An electrical conductor is operatively connected to the heat sink and configured to provide electrical contact between the heat sink and a surface of the conductive enclosure, thereby at least partially shielding the electromagnetic radiation generated by the electronic component.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: January 31, 2006
    Assignee: Unisys Corporation
    Inventors: Keith D. Mease, Mark W. Wessel, Grant M. Smith, Terry W. Louth, Daniel A. Jochym, Ronald T. Gibbs
  • Patent number: 6870743
    Abstract: A computer module for use in a scalable computer system is provided. The computer module includes a chassis at least partially defining an interior and a processor board configured for insertion into a processor region of the interior of the chassis along an insertion axis. The processor board includes at least one connector for communicating signals to and from the processor board. The connector of the processor board is oriented along a connection axis that is substantially perpendicular to the insertion axis. The computer module also includes a memory board configured for insertion into a memory region of the interior of the chassis along the insertion axis. The memory board includes at least one connector for communicating signals to and from the memory board. The connector of the memory board is oriented along the connection axis.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: March 22, 2005
    Assignee: Unisys Corporation
    Inventors: Keith D. Mease, Sean M. McClain, Joseph J. Scorsone, Daniel A. Jochym, David H. Chase
  • Patent number: 6862181
    Abstract: An apparatus directs airflow adjacent a circuit board to provide cooling and provides shielding for the circuit board to reduce EMI. The apparatus comprises a barrier for directing airflow and a conductive layer, electrically grounded and physical associated with the barrier, for providing shielding for the circuit board to reduce EMI.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: March 1, 2005
    Assignee: Unisys Corporation
    Inventors: Grant M. Smith, Daniel A. Jochym, Mark W. Wessel
  • Patent number: 6842879
    Abstract: A printed circuit board adapted for prototyping comprises a processor module, a section reserved for an I/O module to be added at a later time, a first and a second connector, a bridge circuit and a secondary bus. The secondary bus provides a communication path between the processor module and I/O module that is to be added at a later time. The second connector is coupled to the secondary bus to enable a separate I/O card to be connected to the printed circuit board and to serve temporarily as the I/O module of the board. This permits prototyping in the absence of an I/O module in the second portion of the board.
    Type: Grant
    Filed: November 21, 2000
    Date of Patent: January 11, 2005
    Assignee: Unisys Corporation
    Inventors: Daniel A. Jochym, Rama Rao V. Voddi
  • Patent number: 6842344
    Abstract: A printed circuit board having a dielectric layer is disclosed. At least one signal trace is disposed adjacent a first surface of the dielectric layer in a first signal area. A reference plane is disposed adjacent a second surface of the dielectric layer in a first reference area positioned opposite the first signal area. The reference plane is configured to carry a reference potential for signals on the signal trace. At least one other signal trace is disposed adjacent the second surface of the dielectric layer in a second signal area and coupled to the signal trace in said first signal area. A second reference plane is disposed adjacent the first surface of the first dielectric layer in a second reference area positioned opposite the second signal area. The second reference plane is configured to carry the reference potential for signals on the other signal trace.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: January 11, 2005
    Assignee: Unisys Corporation
    Inventors: Robert Fix, Daniel A. Jochym, Christian E. Shenberger
  • Patent number: 6818838
    Abstract: An apparatus and method for positioning components on a circuit board and routing traces therebetween is disclosed. The circuit board has two pairs of electrical component-receiving footprint and a plurality of traces interconnecting the footprints. The two pairs of electrical component-receiving footprints are spaced from one another in a first direction, wherein the footprints in each of the pairs are substantially aligned in a second direction substantially perpendicular to the first direction, and wherein at least one of the footprints in one of the pairs is offset from at least one of the footprints in the other of the pairs in both the first and second directions. The plurality of traces interconnect each of the footprints includes at least one trace connecting the offset footprints.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: November 16, 2004
    Assignee: Unisys Corporation
    Inventors: Daniel A. Jochym, Christian E. Shenberger, Joseph N. Closs
  • Publication number: 20040184251
    Abstract: A computer module for use in a scalable computer system is provided. The computer module includes a chassis at least partially defining an interior and a processor board configured for insertion into a processor region of the interior of the chassis along an insertion axis. The processor board includes at least one connector for communicating signals to and from the processor board. The connector of the processor board is oriented along a connection axis that is substantially perpendicular to the insertion axis. The computer module also includes a memory board configured for insertion into a memory region of the interior of the chassis along the insertion axis. The memory board includes at least one connector for communicating signals to and from the memory board. The connector of the memory board is oriented along the connection axis.
    Type: Application
    Filed: March 17, 2003
    Publication date: September 23, 2004
    Inventors: Keith D. Mease, Sean M. McClain, Joseph J. Scorsone, Daniel A. Jochym, David H. Chase
  • Patent number: 6787708
    Abstract: A computer-aided design (CAD) tool is used to create a preliminary design of a mulit-layered printed circuit board, comprising a layout of electrical components on a main region of a printed circuit board and a routing of signal traces among the lectical components within the main region. An extended region is then added to the design on the CAD tool that comprises a layout of selected debug connectors on the extended region and at least one additional signal layer. Traces connecting the debug connectors to selected vias of the main region of the printed circuit board are then routed on the added signal layer only. A prototype board is then created and tested. Once testing is complete, the extended region and the at least one additional layer are removed from the design in the CAD tool without disturbing the layout of components and routing of signal traces on the main region of the printed circuit board.
    Type: Grant
    Filed: November 21, 2000
    Date of Patent: September 7, 2004
    Assignee: Unisys Corporation
    Inventors: Daniel A. Jochym, James C. Witte, Michael John Bradley
  • Patent number: 6747217
    Abstract: A printed circuit board (PCB) comprises a number of electrically conductive layers. Instead of coating, or plating, a PCB through-hole with an electrically conductive material to form a via (for the purpose of connecting together signal paths across the electrically conductive layers)—the via is formed by placing a conductive stake, or conductive pin, in the through-hole.
    Type: Grant
    Filed: November 20, 2001
    Date of Patent: June 8, 2004
    Assignee: Unisys Corporation
    Inventors: Daniel A. Jochym, Robert H. Fix
  • Patent number: 6678874
    Abstract: A computer aided design (CAD) tool takes into account system-level design parameters by considering data from a number of printed circuit board (PCB)-related data files. In one embodiment, the CAD tool takes into account signal path length at the system-level for a computer system comprising more than one PCB. In another embodiment, the CAD tool provides a three-dimensional display for showing how at least one signal path traverses the computer system in going from one PCB to another PCB.
    Type: Grant
    Filed: November 28, 2001
    Date of Patent: January 13, 2004
    Assignee: Unisys Corporation
    Inventors: Daniel A. Jochym, Joseph N Closs
  • Patent number: 5530603
    Abstract: An apparatus for blocking air and dust from entering a floppy disk drive. A floppy disk has a compressible non-porous dam (a non-porous foam strip material) attached to the front-tip edge of the floppy disk. When the floppy disk is inserted into the drive the dam compresses to conform to the volume of the drive opening. Accordingly, air as well as dust is blocked from the disk drive and air flow is improved within the computer cabinetry.
    Type: Grant
    Filed: March 27, 1995
    Date of Patent: June 25, 1996
    Assignee: Unisys Corporation
    Inventors: Verne W. Weidman, Daniel A. Jochym, Arthur J. Mattia