Patents by Inventor Daniel A. Ortega

Daniel A. Ortega has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130332705
    Abstract: A combination of hardware and software collect profile data for asynchronous events, at code region granularity. An exemplary embodiment is directed to collecting metrics for prefetching events, which are asynchronous in nature. Instructions that belong to a code region are identified using one of several alternative techniques, causing a profile bit to be set for the instruction, as a marker. Each line of a data block that is prefetched is similarly marked. Events corresponding to the profile data being collected and resulting from instructions within the code region are then identified. Each time that one of the different types of events is identified, a corresponding counter is incremented. Following execution of the instructions within the code region, the profile data accumulated in the counters are collected, and the counters are reset for use with a new code region.
    Type: Application
    Filed: December 29, 2011
    Publication date: December 12, 2013
    Inventors: Raul Martinez, Enric Gibert Codina, Pedro Lopez, Marti Torrents Lapuerta, Polychronis Xekalakis, Georgios Tournavitis, Kyriakos A. Stavrou, Demos Pavlou, Daniel Ortega, Alejandro Martinez Vicente, Pedro Marcuello, Grigorios Magklis, Josep M. Codina, Crispin Gomez Requena, Antonio Gonzalez, Mirem Hyuseinova, Christos Kotselidis, Fernando Latorre, Marc Lupon, Carlos Madriles
  • Publication number: 20130326199
    Abstract: Disclosed is an apparatus and method generally related to controlling a multimedia extension control and status register (MXCSR). A processor core may include a floating point unit (FPU) to perform arithmetic functions; and a multimedia extension control register (MXCR) to provide control bits to the FPU. Further an optimizer may be used to select a speculative multimedia extension status register (SPEC_MXSR) from a plurality of SPEC_MXSRs to update a multimedia extension status register (MXSR) based upon an instruction.
    Type: Application
    Filed: December 29, 2011
    Publication date: December 5, 2013
    Inventors: Grigorios Magklis, Josep M. Codina, Craig B. Zilles, Michael Neilly, Sridhar Samudrala, Alejandro Martinez Vicente, Polychronis Xekalakis, F. Jesus Sanchez, Marc Lupon, Georgios Tournavitis, Enric Gibert Codina, Crispin Gomez Requena, Antonio Gonzalez, Mirem Hyuseinova, Christos E. Kotselidis, Fernando Latorre, Pedro Lopez, Carlos Madriles Gimeno, Pedro Marcuello, Raul Martinez, Daniel Ortega, Demos Pavlou, Kyriakos A. Stavrou
  • Publication number: 20130268735
    Abstract: Techniques are described for providing an enhanced cache coherency protocol for a multi-core processor that includes a Speculative Request For Ownership Without Data (SRFOWD) for a portion of cache memory. With a SRFOWD, only an acknowledgement message may be provided as an answer to a requesting core. The contents of the affected cache line are not required to be a part of the answer. The enhanced cache coherency protocol may assure that a valid copy of the current cache line exists in case of misspeculation by the requesting core. Thus, an owner of the current copy of the cache line may maintain a copy of the old contents of the cache line. The old contents of the cache line may be discarded if speculation by the requesting core turns out to be correct. Otherwise, in case of misspeculation by the requesting core, the old contents of the cache line may be set back to a valid state.
    Type: Application
    Filed: December 29, 2011
    Publication date: October 10, 2013
    Inventors: Enric Gibert Codina, Fernando Latorre, Josep M. Codina, Crispin Gomez Requena, Antonio Gonzalez, Meyrem Hyuseinova, Christos E. Kotselidis, Pedro Lopez, Marc Lupon, Carlos Madriles, Grigorios Magklis, Pedro Marcuello, Alejandro Martinez Vicente, Raul Martinez, Daniel Ortega, Demos Pavlou, Kyriakos A. Stavrou, Georgios Tournavitis, Polychronis Xekalakis
  • Patent number: 8291488
    Abstract: Upon an intermediary device on a network being turned on, controlling system software at the intermediary device is booted such that no public network address is ever assigned to the intermediary device. The intermediary device sends a boot message over the network to central authority software running on one or more first computing devices on the network. The central authority software in response sends messages over the network to the intermediary device and to a second computing device on the network to establish a private tunnel with one another. The intermediary device and the second computing device establish the private tunnel with one another over the network. The intermediary device then opens a remote connection to the second computing device through the private tunnel so that peripherals connected to the intermediary device as if they were directly connected to the second computing device.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: October 16, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Paolo Faraboschi, Ayose Falcon, Daniel Ortega
  • Patent number: 8126696
    Abstract: Nodes interconnected by a network have their substantially parallel execution simulated. Substantially parallel execution of the nodes during a current quantum of simulation time having a quantum length is simulated. Simulation of execution can result in simulation of inter-node data packets being transmitted over the network. When the current quantum of simulation time has elapsed, simulation of execution of the nodes is synchronized. If no inter-node data packets were transmitted in simulation during the current quantum of simulation time, then the quantum length is increased. If one or more inter-node data packets were transmitted in simulation during the current quantum of simulation time, then the quantum length is decreased. This process is then repeated for a next quantum of simulation time having the quantum length as has been increased or decreased.
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: February 28, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Paolo Faraboschi, Daniel Ortega, Ayose Falcon Samper
  • Patent number: 7912690
    Abstract: A method for simulating a system normally performs functional simulation of the system without performing timing simulation of the system. The method dynamically samples the functional simulation of the system at intervals to determine whether the functional simulation has entered into a new phase. Where the functional simulation has entered into a new phase, the method performs both the functional simulation and the timing simulation of the system for one or more intervals.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: March 22, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ayose Falcon, Paolo Faraboschi, Daniel Ortega
  • Publication number: 20100198827
    Abstract: A method for finding text reading order in a document such as a scanned newspaper or magazine includes the steps of pruning unnecessary text zones using semantic analysis (40), using text correlation measures to cluster zones (41), and then finding a reading order within each of the clusters (42).
    Type: Application
    Filed: July 27, 2005
    Publication date: August 5, 2010
    Inventors: Sherif Yacoub, Daniel Ortega, Paolo Faraboschi, Jose Abad Peiro
  • Publication number: 20090282234
    Abstract: Upon an intermediary device on a network being turned on, controlling system software at the intermediary device is booted such that no public network address is ever assigned to the intermediary device. The intermediary device sends a boot message over the network to central authority software running on one or more first computing devices on the network. The central authority software in response sends messages over the network to the intermediary device and to a second computing device on the network to establish a private tunnel with one another. The intermediary device and the second computing device establish the private tunnel with one another over the network. The intermediary device then opens a remote connection to the second computing device through the private tunnel so that peripherals connected to the intermediary device as if they were directly connected to the second computing device.
    Type: Application
    Filed: June 26, 2007
    Publication date: November 12, 2009
    Inventors: Paolo Faraboschi, Ayose Falcon, Daniel Ortega
  • Patent number: 7555419
    Abstract: Instructions to be executed on a system are simulated. Representative simulation phases of the instructions, which most affect simulation results of the instructions to be executed on the system, are dynamically determined. For each representative simulation phase of the instructions, a model is selected from a number of models that provides specified accuracy with a minimal amount of simulation time, and the representative simulation phase is simulated using the model selected. The simulation results for the instructions to be executed on the system are then output.
    Type: Grant
    Filed: July 23, 2006
    Date of Patent: June 30, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Paolo Faraboschi, Daniel Ortega, Ayose Falcon
  • Publication number: 20080270959
    Abstract: A method performs functional simulation of a system as influenced by timing simulation of the system. The method performs functional simulation of a system, and periodically performs timing simulation of the system. The functional simulation of the system takes into account the timing simulation of the system that is periodically performed.
    Type: Application
    Filed: April 25, 2007
    Publication date: October 30, 2008
    Inventors: Paolo Faraboschi, Ayose Falcon, Daniel Ortega
  • Publication number: 20080270952
    Abstract: A method for simulating a system normally performs functional simulation of the system without performing timing simulation of the system. The method dynamically samples the functional simulation of the system at intervals to determine whether the functional simulation has entered into a new phase. Where the functional simulation has entered into a new phase, the method performs both the functional simulation and the timing simulation of the system for one or more intervals.
    Type: Application
    Filed: April 25, 2007
    Publication date: October 30, 2008
    Inventors: Ayose Falcon, Paolo Faraboschi, Daniel Ortega
  • Publication number: 20080126071
    Abstract: Instructions to be executed on a system are simulated. Representative simulation phases of the instructions, which most affect simulation results of the instructions to be executed on the system, are dynamically determined. For each representative simulation phase of the instructions, a model is selected from a number of models that provides specified accuracy with a minimal amount of simulation time, and the representative simulation phase is simulated using the model selected. The simulation results for the instructions to be executed on the system are then output.
    Type: Application
    Filed: July 23, 2006
    Publication date: May 29, 2008
    Inventors: Paolo Faraboschi, Daniel Ortega, Ayose Falcon
  • Publication number: 20060274938
    Abstract: An automated document processing system is configured to normalize zones obtained from a document, ant to extract articles from the normalized zones. In one configuration, the system receives at least one zone from the document, and applies at least one zone-breaking factor, thereby creating normalized sub-zones within which text lines are consistent with the at least one zone-breaking factor. The normalized sub-zones may be evaluated to obtain a reading order. Adjacent sub-zones are joined if text similarity exceeds a threshold value. Weakly joined sub-zones are separated where indicated by a topic vectors analysis of the weakly joined sub-zones.
    Type: Application
    Filed: October 19, 2005
    Publication date: December 7, 2006
    Inventors: Daniel Ortega, Sherif Yacoub, Jose Peiro, Paolo Faraboschi
  • Publication number: 20060142812
    Abstract: A pacemaker is disclosed which reestablishes or keeps the physiological electric conduction of the heart and a method of application. The pacemaker is a pulse generator, it has a ventricular output including at least two superimposed monopolar pulsewaves of reversed polarity between each other, with programmable configuration, with respect to a neutral which can be the pacemaker's metallic box or a third electrode in the case of a tripolar catheter. The catheter can have a deflectable sheath, with an electrode on its distal tip. The invention consists of a new pacemaker, and a method of application in the right ventricular septum, being able to use in order to facilitate the implantation and to avoid the connection and the disconnection, a sheath to check a proper place and then screw the catheter in said place.
    Type: Application
    Filed: December 13, 2005
    Publication date: June 29, 2006
    Applicant: ACTION MEDICAL, INC.
    Inventors: Daniel Ortega, Alberto Giniger
  • Publication number: 20060136001
    Abstract: A method and apparatus are disclosed for treating a condition of a patient's heart includes placing a first electrode and a second electrode in a right ventricle of the heart. A reference electrode is placed within the patient and internal or external to the heart. A pacing signal is generated including a first signal component, a second signal component and a reference component with the first and second signal components having opposite polarity and with both of the first and second components having a potential relative to the reference component. The first component is transmitted to the first electrode. The second component is transmitted to the second electrode. The reference electrode is connected to the reference component which may be an electrical ground. The pacing signal and the placement of the electrodes are selected to alter a contraction of a left ventricle of the heart.
    Type: Application
    Filed: December 13, 2005
    Publication date: June 22, 2006
    Inventors: Daniel Ortega, Alberto Giniger, Qingsheng Zhu, J. Shapland
  • Patent number: 7054516
    Abstract: An integrated optical device includes a substrate, at least a face of the substrate providing a first cladding layer, the first cladding layer including a mesa formation; a waveguide core formed on the first cladding layer so that the waveguide core substantially covers the mesa formation; and a second cladding layer formed over the waveguide core and the first cladding layer.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: May 30, 2006
    Inventors: Russell Childs, Mark Volanthen, Johannes Bos, Daniel Ortega Gonzalez, Graeme Gordon, Antoine Pujol
  • Publication number: 20040170368
    Abstract: An integrated optical device includes a substrate, at least a face of the substrate providing a first cladding layer, the first cladding layer including a mesa formation; a waveguide core formed on the first cladding layer so that the waveguide core substantially covers the mesa formation; and a second cladding layer formed over the waveguide core and the first cladding layer.
    Type: Application
    Filed: December 15, 2003
    Publication date: September 2, 2004
    Applicant: ALCATEL OPTRONICS UK LIMITED
    Inventors: Russell Childs, Mark Volanthen, Johannes Bos, Daniel Ortega Gonzalez, Graeme Gordon, Antoine Pujol
  • Patent number: 6526203
    Abstract: Arrayed Waveguide Grating with Reduced Crosstalk An Arrayed Waveguide Grating (AWG) having reduced adjacent crosstalk is described. Interspersed ones (21) of the output waveguides of the AWG are of different widths to the remaining output waveguides (23), along corresponding portions of their lengths, preferably in at least an initial portion of the fan-out region. Passband unifonmity is maintained by making all the output waveguides substantially of the same width at the output slab coupler. In the illustrative embodiment, alternate ones of the plurality of output waveguides are tapered to a narrower width (W2) between first and second portions (22,24) thereof and the remaining ones of the output waveguides are of a substantially uniform width (W1) between corresponding first and second portions thereof.
    Type: Grant
    Filed: May 30, 2001
    Date of Patent: February 25, 2003
    Assignee: Alcatel Optronics UK Limited
    Inventors: Daniel Ortega Gonzalez, Harm Van Weerden
  • Patent number: 5285806
    Abstract: A method and apparatus for sealing off flow in a pipeline for the purpose of repairing the line includes a combination of a restraining rod and inflation bag which can be installed on either or both sides of the intended site of repair; and a flexible sleeve is provided for use in association with the entry ports and any associated valve members for insertion of the restraining rod and bag to prevent the escape of gas from the line during the insertion procedures. Once the line is repaired, the restraining rod and inflation bag can be removed and the entry ports completely sealed off.
    Type: Grant
    Filed: December 30, 1992
    Date of Patent: February 15, 1994
    Assignee: Public Service Company of Colorado
    Inventor: Daniel A. Ortega