Abstract: A testing device for testing a radar device. The testing device may be configured to determine a first frequency difference between a frequency of a first signal or a second signal and a frequency of a third signal based on a first distance value; transmit to the radar device the first signal; receive the second signal from the radar device; transmit to the radar device the third signal at an offset relative to at least one of the first signal and the second signal based on the first frequency difference; and receive from the radar device a fourth signal indicating a second distance value or a second frequency difference between the frequency of the second signal and the frequency of the third signal, determined by the radar device, for comparison with the first distance value or the first frequency difference.

Abstract: A testing device for testing a radar device. The testing device may be configured to determine a first frequency difference between a frequency of a first signal or a second signal and a frequency of a third signal based on a first distance value; transmit to the radar device the first signal; receive the second signal from the radar device; transmit to the radar device the third signal at an offset relative to at least one of the first signal and the second signal based on the first frequency difference; and receive from the radar device a fourth signal indicating a second distance value or a second frequency difference between the frequency of the second signal and the frequency of the third signal, determined by the radar device, for comparison with the first distance value or the first frequency difference.

Abstract: The invention allows the interpolation factor, a critical parameter in sample rate conversion systems, to be computed in a real-time system where there is a complex relationship between a DSP clock and the data clocks. Typically, two or three of the clocks in such a system will have simple relationships (such as CLOCK1=2*CLOCK2). This relationship leads to degenerate cases where, in fact, there are only one or two clocks to consider rather than three. Furthermore, the invention allows for input data rates that are higher than the DSP clock rate. The invention also provides for an arbitrary time delay to be applied to the output signal.

Abstract: The invention allows the interpolation factor, a critical parameter in sample rate conversion systems, to be computed in a real-time system where there is a complex relationship between a DSP clock and the data clocks. Typically, two or three of the clocks in such a system will have simple relationships (such as CLOCK1=2*CLOCK2). This relationship leads to degenerate cases where, in fact, there are only one or two clocks to consider rather than three. Furthermore, the invention allows for input data rates that are higher than the DSP clock rate. The invention also provides for an arbitrary time delay to be applied to the output signal.

Abstract: A jitter measurement technique utilizing a high-bandwidth undersampling voltage measurement instrument is presented. A trigger is derived from the a signal having a repetitive signal pattern. The signal is compared with a threshold at a plurality of times relative to the trigger during multiple repetitions of the signal pattern to produce measurement samples indicative of signal level relative to the threshold. The measurement samples are used to determine the probability of signal edge states as a function of time for the multiple repetitions. The probability of signal edge states are used to determine an edge probability density as a function of time. A histogram of signal state transition times can be prepared from the edge probability density. Mean deviation of edge transitions of the signal can be estimates, and standard deviation of edge transitions of the signal can be estimated to give the root-mean-square (rms) jitter of the signal.

Abstract: Method and apparatus for digital sample rate conversion. A mixed signal tester employing digital sample rate conversion is also disclosed. According to the invention, variable phase jitter is introduced into an input digital signal to produce an intermediate signal at a second sampling rate. The intermediate signal is then low pass filtered to produce the output signal. This technique is used in a mixed signal tester where one period of a stimulus signal is stored in a digital memory. The frequency of the analog stimulus signal is dictated by the rate at which the digital signal is retrieved from the memory. Sample rate conversion is used to convert the signal retrieved from memory, regardless of the rate at which it was retrieved, to the sampling rate for which a digital to analog converter has been calibrated.