Patents by Inventor Daniel A. Steigerwald

Daniel A. Steigerwald has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190027664
    Abstract: In embodiments of the invention, a passivation layer is disposed over a side of a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A material configured to adhere to an underfill is disposed over an etched surface of the semiconductor structure.
    Type: Application
    Filed: September 26, 2018
    Publication date: January 24, 2019
    Inventors: Frederic Stephane Diana, Kwong-Hin Henry Choy, Qingwei Mo, Serge L. Rudaz, Frank L. Wei, Daniel A. Steigerwald
  • Patent number: 10134965
    Abstract: In embodiments of the invention, a passivation layer is disposed over a side of a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A material configured to adhere to an underfill is disposed over an etched surface of the semiconductor structure.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: November 20, 2018
    Assignee: Lumileds LLC
    Inventors: Frederic Stephane Diana, Kwong-Hin Henry Choy, Qingwei Mo, Serge L. Rudaz, Frank L. Wei, Daniel A. Steigerwald
  • Patent number: 10134964
    Abstract: In embodiments of the invention, a passivation layer is disposed over a side of a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A material configured to adhere to an underfill is disposed over an etched surface of the semiconductor structure.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: November 20, 2018
    Assignee: LUMILEDS LLC
    Inventors: Frederic S. Diana, Henry Kwong-Hin Choy, Qingwei Mo, Serge L. Rudaz, Frank L. Wei, Daniel A. Steigerwald
  • Publication number: 20160204315
    Abstract: In embodiments of the invention, a passivation layer is disposed over a side of a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A material configured to adhere to an underfill is disposed over an etched surface of the semiconductor structure.
    Type: Application
    Filed: March 22, 2016
    Publication date: July 14, 2016
    Inventors: Frederic Stephane Diana, Kwong-Hin Henry Choy, Qingwei Mo, Serge L. Rudaz, Frank L. Wei, Daniel A. Steigerwald
  • Publication number: 20130252358
    Abstract: In embodiments of the invention, a passivation layer is disposed over a side of a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A material configured to adhere to an underfill is disposed over an etched surface of the semiconductor structure.
    Type: Application
    Filed: May 29, 2013
    Publication date: September 26, 2013
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Frederic S. Diana, Henry Kwong-Hin Choy, Qingwei Mo, Serge L. Rudaz, Frank L. Wei, Daniel A. Steigerwald
  • Patent number: 8471282
    Abstract: In embodiments of the invention, a passivation layer is disposed over a side of a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A material configured to adhere to an underfill is disposed over an etched surface of the semiconductor structure.
    Type: Grant
    Filed: June 7, 2010
    Date of Patent: June 25, 2013
    Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company, LLC
    Inventors: Frederic S. Diana, Henry Kwong-Hin Choy, Qingwei Mo, Serge I. Rudaz, Frank L. Wei, Daniel A. Steigerwald
  • Patent number: 8450754
    Abstract: LED layers are grown over a sapphire substrate. Individual flip chip LEDs are formed by trenching or masked ion implantation. Modules containing a plurality of LEDs are diced and mounted on a submount wafer. A submount metal pattern or a metal pattern formed on the LEDs connects the LEDs in a module in series. The growth substrate is then removed, such as by laser lift-off. A semi-insulating layer is formed, prior to or after mounting, that mechanically connects the LEDs together. The semi-insulating layer may be formed by ion implantation of a layer between the substrate and the LED layers. PEC etching of the semi-insulating layer, exposed after substrate removal, may be performed by biasing the semi-insulating layer. The submount is then diced to create LED modules containing series-connected LEDs.
    Type: Grant
    Filed: October 10, 2011
    Date of Patent: May 28, 2013
    Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company, LLC
    Inventors: Michael R. Krames, John E. Epler, Daniel A. Steigerwald, Tal Margalith
  • Patent number: 8400064
    Abstract: A transient voltage suppressor circuit is disclosed for a plurality (N) of LEDs connected in series. Only one zener diode is created for connection to each node between LEDs, and a pair of zener diodes (the “end” zener diodes) are connected to the two pins (anode and cathode pads) of the series string. Therefore, only N+1 zener diodes are used. The end zener diodes (Q1 and Qn+1) effectively create back-to-back zener diodes across the two pins since the zener diodes share a common p+ substrate. The n+ regions of the end zener diodes Q1 and Qn+1 have the highest breakdown voltage requirement and must be placed relatively far apart. Adjacent n+ regions of the intermediate zener diodes have a much lower breakdown voltage requirement so may be located close together. The zener diodes may be placed within a very small footprint or can be larger for better suppressor performance.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: March 19, 2013
    Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company, LLC
    Inventors: Yajun Wei, William D. Collins, III, Daniel A. Steigerwald
  • Patent number: 8384118
    Abstract: Described is a process for forming an LED structure using a laser lift-off process to remove the growth substrate (e.g., sapphire) after the LED die is bonded to a submount. The underside of the LED die has formed on it anode and cathode electrodes that are substantially in the same plane, where the electrodes cover at least 85% of the back surface of the LED structure. The submount has a corresponding layout of anode and cathode electrodes substantially in the same plane. The LED die electrodes and submount electrodes are ultrasonically welded together such that virtually the entire surface of the LED die is supported by the electrodes and submount. Other bonding techniques may also be used. No underfill is used. The growth substrate, forming the top of the LED structure, is then removed from the LED layers using a laser lift-off process.
    Type: Grant
    Filed: April 27, 2010
    Date of Patent: February 26, 2013
    Assignees: Koninklijke Philips electronics N.V., Philips Lumileds Lighting Company LLC
    Inventors: Stefano Schiaffino, Daniel A. Steigerwald, Mari Holcomb, Grigoriy Basin, Paul Martin, John Epler
  • Publication number: 20120025231
    Abstract: LED layers are grown over a sapphire substrate. Individual flip chip LEDs are formed by trenching or masked ion implantation. Modules containing a plurality of LEDs are diced and mounted on a submount wafer. A submount metal pattern or a metal pattern formed on the LEDs connects the LEDs in a module in series. The growth substrate is then removed, such as by laser lift-off. A semi-insulating layer is formed, prior to or after mounting, that mechanically connects the LEDs together. The semi-insulating layer may be formed by ion implantation of a layer between the substrate and the LED layers. PEC etching of the semi-insulating layer, exposed after substrate removal, may be performed by biasing the semi-insulating layer. The submount is then diced to create LED modules containing series-connected LEDs.
    Type: Application
    Filed: October 10, 2011
    Publication date: February 2, 2012
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Michael R. Krames, John E. Epler, Daniel A. Steigerwald, Tal Margalith
  • Publication number: 20110297979
    Abstract: In embodiments of the invention, a passivation layer is disposed over a side of a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A material configured to adhere to an underfill is disposed over an etched surface of the semiconductor structure.
    Type: Application
    Filed: June 7, 2010
    Publication date: December 8, 2011
    Applicants: PHILIPS LUMILEDS LIGHTING COMPANY, LLC, KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Frederic S. DIANA, Henry Kwong-Hin CHOY, Qingwei MO, Serge L. RUDAZ, Frank L. WEI, Daniel A, STEIGERWALD
  • Patent number: 8062916
    Abstract: LED layers are grown over a sapphire substrate. Individual flip chip LEDs are formed by trenching or masked ion implantation. Modules containing a plurality of LEDs are diced and mounted on a submount wafer. A submount metal pattern or a metal pattern formed on the LEDs connects the LEDs in a module in series. The growth substrate is then removed, such as by laser lift-off. A semi-insulating layer is formed, prior to or after mounting, that mechanically connects the LEDs together. The semi-insulating layer may be formed by ion implantation of a layer between the substrate and the LED layers. PEC etching of the semi-insulating layer, exposed after substrate removal, may be performed by biasing the semi-insulating layer. The submount is then diced to create LED modules containing series-connected LEDs.
    Type: Grant
    Filed: November 6, 2008
    Date of Patent: November 22, 2011
    Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company
    Inventors: Michael R. Krames, John E. Epler, Daniel A. Steigerwald, Tal Margalith
  • Publication number: 20110136273
    Abstract: A light emitting device includes a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region. A contact is formed on the semiconductor structure, the contact comprising a reflective metal in direct contact with the semiconductor structure and an additional metal or semi-metal disposed within the reflective metal. In some embodiments, the additional metal or semi-metal is a material with higher electronegativity than the reflective metal. The presence of the high electronegativity material in the contact may increase the overall electronegativity of the contact, which may reduce the forward voltage of the device. In some embodiments, an oxygen-gathering material is included in the contact.
    Type: Application
    Filed: February 17, 2011
    Publication date: June 9, 2011
    Applicant: PHILIPS LUMILEDS LIGHTING COMPANY, LLC
    Inventors: Henry Kwong-Hin Choy, Daniel A. Steigerwald
  • Publication number: 20110057569
    Abstract: A transient voltage suppressor circuit is disclosed for a plurality (N) of LEDs connected in series. Only one zener diode is created for connection to each node between LEDs, and a pair of zener diodes (the “end” zener diodes) are connected to the two pins (anode and cathode pads) of the series string. Therefore, only N+1 zener diodes are used. The end zener diodes (Q1 and Qn+1) effectively create back-to-back zener diodes across the two pins since the zener diodes share a common p+ substrate. The n+ regions of the end zener diodes Q1 and Qn+1 have the highest breakdown voltage requirement and must be placed relatively far apart. Adjacent n+ regions of the intermediate zener diodes have a much lower breakdown voltage requirement so may be located close together. Since there are fewer zener diodes and their spacings may be small, the zener diodes may be placed within a very small footprint or can be larger for better suppressor performance.
    Type: Application
    Filed: September 9, 2009
    Publication date: March 10, 2011
    Applicants: KONINKLIJKE PHILIPS ELECTRONICS N.V., PHILIPS LUMILEDS LIGHTING COMPANY, LLC
    Inventors: Yajun WEI, William D. COLLINS III, Daniel A. STEIGERWALD
  • Publication number: 20100207157
    Abstract: Described is a process for forming an LED structure using a laser lift-off process to remove the growth substrate (e.g., sapphire) after the LED die is bonded to a submount. The underside of the LED die has formed on it anode and cathode electrodes that are substantially in the same plane, where the electrodes cover at least 85% of the back surface of the LED structure. The submount has a corresponding layout of anode and cathode electrodes substantially in the same plane. The LED die electrodes and submount electrodes are ultrasonically welded together such that virtually the entire surface of the LED die is supported by the electrodes and submount. Other bonding techniques may also be used. No underfill is used. The growth substrate, forming the top of the LED structure, is then removed from the LED layers using a laser lift-off process.
    Type: Application
    Filed: April 27, 2010
    Publication date: August 19, 2010
    Applicants: KONINKLIJKE PHILIPS ELECTRONICS N.V., PHILIPS LUMILEDS LIGHTING COMPANY, LLC
    Inventors: Stefano SCHIAFFINO, Daniel A. STEIGERWALD, Mari HOLCOMB, Grigoriy BASIN, Paul MARTIN, John EPLER
  • Patent number: 7736945
    Abstract: Described is a process for forming an LED structure using a laser lift-off process to remove the growth substrate (e.g., sapphire) after the LED die is bonded to a submount. The underside of the LED die has formed on it anode and cathode electrodes that are substantially in the same plane, where the electrodes cover at least 85% of the back surface of the LED structure. The submount has a corresponding layout of anode and cathode electrodes substantially in the same plane. The LED die electrodes and submount electrodes are ultrasonically welded together such that virtually the entire surface of the LED die is supported by the electrodes and submount. Other bonding techniques may also be used. No underfill is used. The growth substrate, forming the top of the LED structure, is then removed from the LED layers using a laser lift-off process.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: June 15, 2010
    Assignees: Philips Lumileds Lighting Company, LLC, Koninklijke Philips Electronics N.V.
    Inventors: Stefano Schiaffino, Daniel A. Steigerwald, Mari Holcomb, Grigoriy Basin, Paul Martin, John Epler
  • Publication number: 20100109030
    Abstract: LED layers are grown over a sapphire substrate. Individual flip chip LEDs are formed by trenching or masked ion implantation. Modules containing a plurality of LEDs are diced and mounted on a submount wafer. A submount metal pattern or a metal pattern formed on the LEDs connects the LEDs in a module in series. The growth substrate is then removed, such as by laser lift-off. A semi-insulating layer is formed, prior to or after mounting, that mechanically connects the LEDs together. The semi-insulating layer may be formed by ion implantation of a layer between the substrate and the LED layers. PEC etching of the semi-insulating layer, exposed after substrate removal, may be performed by biasing the semi-insulating layer. The submount is then diced to create LED modules containing series-connected LEDs.
    Type: Application
    Filed: November 6, 2008
    Publication date: May 6, 2010
    Applicants: KONINKLIJKE PHILIPS ELECTRONICS N.V., PHILIPS LUMILEDS LIGHTING COMPANY, LLC
    Inventors: Michael R. KRAMES, John E. EPLER, Daniel A. STEIGERWALD, Tal MARGALITH
  • Patent number: 7652304
    Abstract: A light emitting device includes a layer of first conductivity type, a layer of second conductivity type, and a light emitting layer disposed between the layer of first conductivity type and the layer of second conductivity type. A via is formed in the layer of second conductivity type, down to the layer of first conductivity type. The vias may be formed by, for example, etching, ion implantation, diffusion, or selective growth of at least one layer of second conductivity type. A first contact electrically contacts the layer of first conductivity type through the via. A second contact electrically contacts the layer of second conductivity type. A ring that surrounds the light emitting layer and is electrically connected to the first contact electrically contacts the layer of first conductivity type.
    Type: Grant
    Filed: August 15, 2006
    Date of Patent: January 26, 2010
    Assignee: Philips Lumileds Lighting Company, LLC
    Inventors: Daniel A. Steigerwald, Jerome C. Bhat, Michael J. Ludowise
  • Publication number: 20100006864
    Abstract: A sapphire growth substrate wafer has epitaxially grown over it N-type layers, an active layer, and P-type layers to form GaN LEDs. Each LED is a flip-chip with its cathode contact and anode contact formed on the same side. The wafer is then diced to separate out the LEDs. A P-type silicon submount wafer has N-type doped interconnect regions for interconnecting all the cathode contacts together after the LEDs are mounted on the submount wafer. The sapphire substrate is then removed by a laser lift-off process. A bias voltage is then applied to the cathode contacts via the interconnect regions to bias the N-type layers for a photo-electrochemical etching process that roughens the exposed layer for increased light extraction. The submount wafer is then diced, cutting through the doped interconnect regions.
    Type: Application
    Filed: July 11, 2008
    Publication date: January 14, 2010
    Applicants: Philips Lumileds Lighting Company, LLC, Koninklijke Philips Electronics N.V.
    Inventor: Daniel A. Steigerwald
  • Publication number: 20090250713
    Abstract: A light emitting device includes a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region. A contact is formed on the semiconductor structure, the contact comprising a reflective metal in direct contact with the semiconductor structure and an additional metal or semi-metal disposed within the reflective metal. In some embodiments, the additional metal or semi-metal is a material with higher electronegativity than the reflective metal. The presence of the high electronegativity material in the contact may increase the overall electronegativity of the contact, which may reduce the forward voltage of the device. In some embodiments, an oxygen-gathering material is included in the contact.
    Type: Application
    Filed: April 4, 2008
    Publication date: October 8, 2009
    Applicant: PHILIPS LUMILEDS LIGHTING COMPANY, LLC
    Inventors: Henry Kwong-Hin Choy, Daniel A. Steigerwald