Abstract: Compositions comprising: an epoxy containing cyclic olefin resin with a water absorption of 2% or less; one or more phenolic resins with water absorption of less than 2% or less; an epoxy catalyst; optionally one or more of an electrically insulated filler, a defoamer and a colorant and one or more organic solvents. The compositions are useful as encapsulants and have a cure temperature of 190° C. or less.

Abstract: Thick-film capacitors are formed on ceramic interconnect substrates having high capacitance densities and other desirable electrical and physical properties. The capacitor dielectrics are fired at high temperatures.

Abstract: Multilayer cathode backplate structures are provided for use with a field emitter in display panels. Processes for making the structures are also disclosed. The backplate structures are made of a plurality of electrodes separated by one or more patterned layers of a dielectric composition.

Abstract: A power core comprising: at least one embedded singulated capacitor layer containing at least one embedded singulated capacitor; and at least one planar capacitor laminate; wherein at least one planar capacitor laminate serves as a low inductance path to supply a charge to at least one embedded singulated capacitor; and wherein said embedded singulated capacitor is connected in parallel to said planar capacitor laminate.

Abstract: The present invention relates to a device comprising a power core wherein said power core comprises: at least one embedded singulated capacitor layer containing at least one embedded singulated capacitor; and at least one planar capacitor laminate; wherein said planar capacitor laminate serves as a low inductance path to supply a charge to said at least one embedded singulated capacitor; and wherein said at least one embedded singulated capacitor is connected in parallel to at least one of the said planar capacitor laminates; and wherein said power core is interconnected to at least one signal layer.

Abstract: The present invention relates to a power core comprising: at least one embedded surface mount technology (SMT) discrete chip capacitor layer comprising at least one embedded SMT discrete chip capacitor; and at least one planar capacitor laminate; wherein at least one planar capacitor laminate serves as a low inductance path to supply a charge to at least one embedded SMT discrete chip capacitor; and wherein said embedded SMT discrete chip capacitor is connected in parallel to said planar capacitor laminate.