Patents by Inventor Daniel APPERLOO

Daniel APPERLOO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260135697
    Abstract: It is provided a non-transitory computer-readable medium storing instructions that, when executed by one or more processing circuitries of an apparatus, causing the one or more processing circuitries to perform locally on the apparatus a method. The method includes receiving configuration inputs for a target semiconductor device, the configuration inputs comprising a device identifier, one or more safety-critical parameters, and profile-specific operational parameters for one or more semiconductor device configuration profiles. The method further includes generating a first set of configuration data for programming into a non-volatile one-time programmable memory of the target semiconductor device. The method further includes generating a second set of configuration data for a non-volatile rewritable memory of the target semiconductor device.
    Type: Application
    Filed: November 14, 2025
    Publication date: May 14, 2026
    Inventors: Miraben PATEL, Ingrid MURPHY, Kamraan NASIM, Daniel APPERLOO, Avi MORALI, Allen GARDINER, Sreenadh KARETI, Pawan CHHABRA, Anthony GIARDINA, Marian CRETU, Marcus WINSTON, Biju Neerthattil SUDHAKARAN, Sean DARDIS, Pratap PRASAD, Sreeja MENON, Joaquin ROMERA
  • Publication number: 20260127007
    Abstract: It is provided a non-transitory computer-readable medium storing instructions that, when executed by a processing circuitry of an apparatus, causing the processing circuitry to perform locally on the apparatus a method. The method includes transmitting, to a boot controller of the computing system, a request to initiate a single-block transfer of full configuration data corresponding to the firmware of the component. The request comprises a destination address within a local memory of the component and a size of the configuration data. The method further includes receiving, from the boot controller, an acknowledgement indicating that the full configuration data has been loaded as a single block into the local memory at the destination address. The method further includes in response to the acknowledgement, parsing the single block of the full configuration data residing in the local memory to apply one or more configuration settings for the component.
    Type: Application
    Filed: November 14, 2025
    Publication date: May 7, 2026
    Inventors: Miraben PATEL, Avi MORALI, Manoj THAYILTHEKKATHIL, Sean DARDIS, William O'NEILL, Sumana VENUR, Kamraan NASIM, Ingrid MURPHY, Marian CRETU, Daniel APPERLOO, Anthony GIARDINA, Pawan CHHABRA, Marcus WINSTON
  • Publication number: 20260104749
    Abstract: Some aspects of the present disclosure relate to a power management apparatus for a memory subsystem of a graphics processing unit, the power management apparatus comprising first interface circuitry for communicating with a system firmware of a host computer hosting the graphics processing unit, second interface circuitry for communicating with one or more components of the memory subsystem of the graphics processing unit, processor circuitry configured to obtain a memory subsystem control input from the system firmware, trigger execution of a sequence of operations in response to the memory subsystem control input, and provide a memory subsystem control output to the system firmware based on a result of the sequence of operations.
    Type: Application
    Filed: December 5, 2025
    Publication date: April 16, 2026
    Inventors: Sreeja MENON, Marcus WINSTON, Pawan CHHABRA, Joaquin ROMERA, Marian CRETU, Vinod INIPODU MURUGAN, Sean DARDIS, Ingrid MURPHY, Kamraan NASIM, Daniel APPERLOO, Miraben PATEL, Pratap PRASAD, Biju Neerthattil SUDHAKARAN