Patents by Inventor Daniel Arie Leder

Daniel Arie Leder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for scalable architectures in stackable three-dimensional integrated circuits and electronics
    Patent number: 7046522
    Abstract: The design methods described enable three-dimensional integrated circuit systems in which all of the dies, in a vertically bonded stack of dies, are identical. Only one mask set and wafer type is required since a single circuit design is produced for one die in the stack and reused for all the dies with little or no modification. The system scales directly as the level of stacking is increased while incurring no extra design effort, beyond that required for the initial design.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: May 16, 2006
    Inventors: Raymond Jit-Hung Sung, Tyler Lee Brandon, John Conrad Koob, Duncan George Elliott, Daniel Arie Leder
  • Method for scalable architectures in stackable three-dimentsional integrated circuits and electronics
    Publication number: 20030178228
    Abstract: The design methods described enable three-dimensional integrated circuit systems in which all of the dies, in a vertically bonded stack of dies, are identical. Only one mask set and wafer type is required since a single circuit design is produced for one die in the stack and reused for all the dies with little or no modification. The system scales directly as the level of stacking is increased while incurring no extra design effort, beyond that required for the initial design.
    Type: Application
    Filed: March 20, 2003
    Publication date: September 25, 2003
    Inventors: Raymond Jit-Hung Sung, Tyler Lee Brandon, John Conrad Koob, Duncan George Elliott, Daniel Arie Leder