Abstract: The present disclosure relates to a computer-implemented method for electronic design simulation using a profiler. The method may include simulating, using a computing device, an electronic design associated with a programming language. The method may further include recording a first time corresponding to a first user-defined point in the simulation. The method may also include recording a second time corresponding to a second user-defined point in the simulation. The method may further include determining a difference in time between the first and second times and displaying a visualization including at least one of the first time, the second time, a value of a variable at the first time, a value of the variable at a second time, and the difference in time.

Abstract: The present disclosure relates to a computer-implemented method for electronic design verification. Embodiments may include providing, using one or more processors, an electronic design verification environment having a plurality of randomize calls associated therewith. Embodiments can also include selecting one of the plurality of randomize calls for analysis at a constraint solver engine and iteratively analyzing the selected randomize call using a plurality of constraint solver algorithms. Embodiments can also include automatically determining a most effective constraint solver algorithm for the selected randomize call.

Abstract: The present disclosure relates to a computer-implemented method for electronic design simulation. The method may include providing, using at least one computing device, an electronic design. The method may also include associating, using the at least one computing device, an identifier with each constraint solver call utilized in a simulation of the electronic design. The method may also include generating, using the at least one computing device, an application programming interface configured to allow a user to navigate through electronic design simulation results based upon, at least in part, the identifier associated with each constraint solver call.

Abstract: The present disclosure relates to a computer-implemented method for electronic design simulation. The method may include providing, using at least one computing device, an electronic design and associating, using the at least one computing device, one or more identifiers with each constraint solver call utilized in a simulation of the electronic design. The method may further include automatically generating, using the at least one computing device, a coverage model for one of more constraints associated with the electronic design, the coverage model being based upon, at least in part, the one or more identifiers.