Patents by Inventor Daniel Barnard
Daniel Barnard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240144582Abstract: A system and method for performing intersection testing of rays in a ray tracing system. The ray tracing system uses a hierarchical acceleration structure comprising a plurality of nodes, each identifying one or more elements able to be intersected by a ray. The system makes use of a serial-mode ray intersection process, in which, when a ray intersects a bounding volume, a limited number of new ray requests are generated.Type: ApplicationFiled: January 8, 2024Publication date: May 2, 2024Inventor: Daniel Barnard
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Patent number: 11887244Abstract: A system and method for performing intersection testing of rays in a ray tracing system. The ray tracing system uses a hierarchical acceleration structure comprising a plurality of nodes, each identifying one or more elements for intersection testing. The system defines and updates progress information that identifies, for a ray, leaf nodes of the hierarchical acceleration structure which identify elements for which it is not yet known whether or not the ray interests.Type: GrantFiled: December 10, 2021Date of Patent: January 30, 2024Assignee: Imagination Technologies LimitedInventor: Daniel Barnard
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Patent number: 11869133Abstract: A system and method for performing intersection testing of rays in a ray tracing system. The ray tracing system uses a hierarchical acceleration structure comprising a plurality of nodes, each identifying one or more elements able to be intersected by a ray. The system makes use of a serial-mode ray intersection process, in which, when a ray intersects a bounding volume, a limited number of new ray requests are generated.Type: GrantFiled: September 30, 2021Date of Patent: January 9, 2024Assignee: Imagination Technologies LimitedInventor: Daniel Barnard
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Patent number: 11868426Abstract: Hardware implementations of, and methods for processing, a convolution layer of a DNN that comprise a plurality of convolution engines wherein the input data and weights are provided to the convolution engines in an order that allows input data and weights read from memory to be used in at least two filter-window calculations performed either by the same convolution engine in successive cycles or by different convolution engines in the same cycle. For example, in some hardware implementations of a convolution layer the convolution engines are configured to process the same weights but different input data each cycle, but the input data for each convolution engine remains the same for at least two cycles so that the convolution engines use the same input data in at least two consecutive cycles.Type: GrantFiled: October 26, 2021Date of Patent: January 9, 2024Assignee: Imagination Technologies LimitedInventors: Chris Martin, David Hough, Clifford Gibson, Daniel Barnard
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Patent number: 11836846Abstract: A system and method for performing intersection testing of rays in a ray tracing system. The ray tracing system uses a hierarchical acceleration structure comprising a plurality of nodes, each identifying one or more elements able to be intersected by a ray. The system makes use of a serial-mode ray intersection process, in which, when a ray intersects a bounding volume, a limited number of new ray requests are generated.Type: GrantFiled: September 30, 2021Date of Patent: December 5, 2023Assignee: Imagination Technologies LimitedInventor: Daniel Barnard
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Publication number: 20230334750Abstract: Shader processing units for a graphics processing unit that are configured to execute one or more ray tracing shaders that process ray data associated with one or more rays. The ray data for a ray includes a plurality of ray data elements. The shader processing unit comprises storage, and load logic. The load logic is configured to receive, as part of a ray tracing shader, a ray load instruction that comprises: (i) information identifying a load group of a plurality of load groups, each load group of the plurality of load groups comprising one or more ray data elements of the plurality of ray data elements, and (ii) information identifying one or more ray data elements of the identified load group to be retrieved from an external unit. In response to the ray load instruction, the load logic sends one or more load requests to the external unit which cause the external unit to retrieve the identified ray data elements of the identified load group for one or more rays.Type: ApplicationFiled: March 26, 2023Publication date: October 19, 2023Inventor: Daniel Barnard
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Publication number: 20230334758Abstract: Shader processing units for a graphics processing unit that are configured to execute one or more ray tracing shaders that generate ray data associated with one or more rays. The ray data for a ray includes a plurality of ray data elements. The shader processing unit comprises local storage, and store logic. The store logic is configured to receive, as part of a ray tracing shader, a ray store instruction that comprises: (i) information identifying a store group of a plurality of store groups, each store group of the plurality of store groups comprising one or more ray data elements of the plurality of ray data elements, and (ii) information identifying one or more ray data elements of the identified store group to be stored in an external unit). In response to receiving the ray store instruction, the store logic retrieves the identified ray data elements for one or more rays from the storage.Type: ApplicationFiled: March 26, 2023Publication date: October 19, 2023Inventor: Daniel Barnard
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Patent number: 11721060Abstract: A system and method for performing intersection testing of rays in a ray tracing system. The ray tracing system uses a hierarchical acceleration structure comprising a plurality of nodes, each identifying one or more elements able to be intersected by a ray. The system iteratively obtains ray requests, each of which identifies a ray and a node against which the ray is to be tested, and performs intersection testing based on the ray requests. The number of ray requests obtained in each iteration reduces responsive to an amount of memory occupied by information relating to the rays (undergoing intersection testing) increasing.Type: GrantFiled: September 30, 2021Date of Patent: August 8, 2023Assignee: Imagination Technologies LimitedInventor: Daniel Barnard
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Publication number: 20230023323Abstract: A ray tracing unit and method for processing a ray in a ray tracing system performs intersection testing for the ray by performing one or more intersection testing iterations. Each intersection testing iteration includes: (i) traversing an acceleration structure to identify the nearest intersection of the ray with a primitive that has not been identified as the nearest intersection in any previous intersection testing iterations for the ray; and (ii) if, based on a characteristic of the primitive, a traverse shader is to be executed in respect of the identified intersection: executing the traverse shader in respect of the identified intersection; and if the execution of the traverse shader determines that the ray does not intersect the primitive at the identified intersection, causing another intersection testing iteration to be performed. When the intersection testing for the ray is complete, an output shader is executed to process a result of the intersection testing for the ray.Type: ApplicationFiled: June 23, 2022Publication date: January 26, 2023Inventors: Daniel Barnard, Mike Livesley, Gregory Clark
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Publication number: 20220383067Abstract: A method for providing input data for a layer of a convolutional neural network “CNN”, the method comprising: receiving input data comprising input data values to be processed in a layer of the CNN; determining addresses in banked memory of a buffer in which the received data values are to be stored based upon format data indicating a format parameter of the input data in the layer and indicating a format parameter of a filter which is to be used to process the input data in the layer; and storing the received input data values at the determined addresses in the buffer for retrieval for processing in the layer.Type: ApplicationFiled: July 19, 2022Publication date: December 1, 2022Inventors: Daniel Barnard, Clifford Gibson, Colin McQuillan
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Patent number: 11423285Abstract: Input data for a layer of a convolutional neural network (CNN) is provided by receiving input data values to be processed in a layer of the CNN. Addresses in banked memory of a buffer are determined in which the received data values are to be stored based upon format data indicating a format parameter of the input data in the layer and indicating a format parameter of a filter which is to be used to process the input data in the layer. The received input data values are stored at the determined addresses in the buffer for retrieval for processing in the layer.Type: GrantFiled: August 12, 2021Date of Patent: August 23, 2022Assignee: Imagination Technologies LimitedInventors: Daniel Barnard, Clifford Gibson, Colin McQuillan
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Publication number: 20220254092Abstract: A system and method for performing intersection testing of rays in a ray tracing system. The ray tracing system uses a hierarchical acceleration structure comprising a plurality of nodes, each identifying one or more elements for intersection testing. The system defines and updates progress information that identifies, for a ray, leaf nodes of the hierarchical acceleration structure which identify elements for which it is not yet known whether or not the ray interests.Type: ApplicationFiled: December 10, 2021Publication date: August 11, 2022Inventor: Daniel Barnard
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Publication number: 20220114780Abstract: Ray tracing systems and methods are described for processing rays. A parent shader is executed for a ray. The parent shader includes a shader recursion instruction which invokes a child shader. The execution of the parent shader for the ray is suspended. Intermediate data for the parent shader is stored in a heap of memory, wherein the intermediate data comprises state data and payload data. Storing intermediate data comprises allocating a first set of registers in the heap of memory for storing payload data, and allocating a second set of registers in the heap of memory for storing state data. When the parent shader is ready to resume, intermediate data for the parent shader is read from the heap of memory, and the execution of the parent shader for the ray is resumed.Type: ApplicationFiled: September 24, 2021Publication date: April 14, 2022Inventors: Daniel Barnard, Alistair Goudie
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Publication number: 20220101591Abstract: A system and method for performing intersection testing of rays in a ray tracing system. The ray tracing system uses a hierarchical acceleration structure comprising a plurality of nodes, each identifying one or more elements able to be intersected by a ray. The system makes use of a serial-mode ray intersection process, in which, when a ray intersects a bounding volume, a limited number of new ray requests are generated.Type: ApplicationFiled: September 30, 2021Publication date: March 31, 2022Inventor: Daniel Barnard
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Publication number: 20220101592Abstract: A system and method for performing intersection testing of rays in a ray tracing system. The ray tracing system uses a hierarchical acceleration structure comprising a plurality of nodes, each identifying one or more elements able to be intersected by a ray. The system iteratively obtains ray requests, each of which identifies a ray and a node against which the ray is to be tested, and performs intersection testing based on the ray requests. The number of ray requests obtained in each iteration reduces responsive to an amount of memory occupied by information relating to the rays (undergoing intersection testing) increasing.Type: ApplicationFiled: September 30, 2021Publication date: March 31, 2022Inventor: Daniel Barnard
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Publication number: 20220101590Abstract: A system and method for performing intersection testing of rays in a ray tracing system. The ray tracing system uses a hierarchical acceleration structure comprising a plurality of nodes, each identifying one or more elements able to be intersected by a ray. The system makes use of a serial-mode ray intersection process, in which, when a ray intersects a bounding volume, a limited number of new ray requests are generated.Type: ApplicationFiled: September 30, 2021Publication date: March 31, 2022Inventor: Daniel Barnard
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Publication number: 20220043886Abstract: Hardware implementations of, and methods for processing, a convolution layer of a DNN that comprise a plurality of convolution engines wherein the input data and weights are provided to the convolution engines in an order that allows input data and weights read from memory to be used in at least two filter-window calculations performed either by the same convolution engine in successive cycles or by different convolution engines in the same cycle. For example, in some hardware implementations of a convolution layer the convolution engines are configured to process the same weights but different input data each cycle, but the input data for each convolution engine remains the same for at least two cycles so that the convolution engines use the same input data in at least two consecutive cycles.Type: ApplicationFiled: October 26, 2021Publication date: February 10, 2022Inventors: Chris Martin, David Hough, Clifford Gibson, Daniel Barnard
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Publication number: 20210390368Abstract: A method for providing input data for a layer of a convolutional neural network “CNN”, the method comprising: receiving input data comprising input data values to be processed in a layer of the CNN; determining addresses in banked memory of a buffer in which the received data values are to be stored based upon format data indicating a format parameter of the input data in the layer and indicating a format parameter of a filter which is to be used to process the input data in the layer; and storing the received input data values at the determined addresses in the buffer for retrieval for processing in the layer.Type: ApplicationFiled: August 12, 2021Publication date: December 16, 2021Inventors: Daniel Barnard, Clifford Gibson, Colin McQuillan
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Patent number: 11157592Abstract: Hardware implementations of, and methods for processing, a convolution layer of a DNN that comprise a plurality of convolution engines wherein the input data and weights are provided to the convolution engines in an order that allows input data and weights read from memory to be used in at least two filter-window calculations performed either by the same convolution engine in successive cycles or by different convolution engines in the same cycle. For example, in some hardware implementations of a convolution layer the convolution engines are configured to process the same weights but different input data each cycle, but the input data for each convolution engine remains the same for at least two cycles so that the convolution engines use the same input data in at least two consecutive cycles.Type: GrantFiled: February 2, 2021Date of Patent: October 26, 2021Assignee: Imagination Technologies LimitedInventors: Chris Martin, David Hough, Clifford Gibson, Daniel Barnard
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Patent number: 11100386Abstract: Data for layers of a convolutional neural network (CNN) is provided by receiving input data values to be processed in a layer of the CNN and determining addresses in banked memory of a buffer in which the received data values are to be stored based upon format data indicating a format parameter of the input data in the layer and indicating a format parameter of a filter which is to be used to process the input data in the layer. The received input data values are then stored at the determined addresses in the buffer for retrieval for processing in the layer.Type: GrantFiled: October 6, 2017Date of Patent: August 24, 2021Assignee: Imagination Technologies LimitedInventors: Daniel Barnard, Clifford Gibson, Colin McQuillan