Patents by Inventor Daniel Baseman

Daniel Baseman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9758364
    Abstract: Microstructure plating systems and methods are described herein. One method includes depositing a plating-resistant material between a microstructure and a bonding layer, wherein the microstructure comprises a plating process base material and immersing the microstructure in a plating solution.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: September 12, 2017
    Assignee: Honeywell International Inc.
    Inventors: Gordon A. Shaw, Daniel Baseman, Chris Finn, Jim G. Hunter
  • Publication number: 20170001856
    Abstract: Microstructure plating systems and methods are described herein. One method includes depositing a plating-resistant material between a microstructure and a bonding layer, wherein the microstructure comprises a plating process base material and immersing the microstructure in a plating solution.
    Type: Application
    Filed: May 23, 2016
    Publication date: January 5, 2017
    Inventors: Gordon A. Shaw, Daniel Baseman, Chris Finn, Jim G. Hunter
  • Patent number: 9371222
    Abstract: Microstructure plating systems and methods are described herein. One method includes depositing a plating-resistant material between a microstructure and a bonding layer, wherein the microstructure comprises a plating process base material and immersing the microstructure in a plating solution.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: June 21, 2016
    Assignee: Honeywell International Inc.
    Inventors: Gordon A. Shaw, Daniel Baseman, Chris Finn, Jim G. Hunter
  • Publication number: 20140260710
    Abstract: Microstructure plating systems and methods are described herein. One method includes depositing a plating-resistant material between a microstructure and a bonding layer, wherein the microstructure comprises a plating process base material and immersing the microstructure in a plating solution.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventors: Gordon A. Shaw, Daniel Baseman, Chris Finn, Jim G. Hunter
  • Patent number: 7183120
    Abstract: A method for fabricating a magnetoresistive device having at least one active region, which may be formed into a magnetic memory bit, sensor element and/or other device, is provided. In forming the magnetoresistive device, a magnetoresistive stack, such as a giant magnetoresistive stack, is formed over a substrate. In addition, a substantially antireflective cap layer formed from titanium nitride, aluminum nitride, and/or other substantially antireflective material, as opposed to the materials commonly used to form a cap layer, is formed over the magnetoresistive stack. The substantially antireflective cap layer is usable as an etch stop for later processing in forming the magnetic memory bit, sensor element and/or other device.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: February 27, 2007
    Assignee: Honeywell International Inc.
    Inventors: Lonny Berg, Daniel Baseman, Wei (David) DZ Zou
  • Publication number: 20060277747
    Abstract: In a method of fabricating a giant magnetoresistive (GMR) device a plurality of magnetoresistive device layers is deposited on a first silicon nitride layer formed on a silicon oxide layer. An etch stop is formed on the magnetoresistive device layers, and a second layer of silicon nitride is formed on the etch stop. The magnetoresistive device layers are patterned to define a plurality of magnetic bits having sidewalls. The second silicon nitride layer is patterned to define electrical contact portions on the etch stop in each magnetic bit. The sidewalls of the magnetic bits are covered with a photoresist layer. A reactive ion etch (RIE) process is used to etch into the first silicon nitride and silicon oxide layers to expose electrical contacts. The photoresist layer and silicon nitride layers protect the magnetoresistive layers from exposure to oxygen during the etching into the silicon oxide layer.
    Type: Application
    Filed: August 22, 2006
    Publication date: December 14, 2006
    Inventors: Daniel Baseman, Lonny Berg, Romney Katti, Daniel Reed, Gordon Shaw, Wei Zou
  • Publication number: 20050097725
    Abstract: In a method of fabricating a giant magnetoresistive (GMR) device a plurality of magnetoresistive device layers is deposited on a first silicon nitride layer formed on a silicon oxide layer. An etch stop is formed on the magnetoresistive device layers, and a second layer of silicon nitride is formed on the etch stop. The magnetoresistive device layers are patterned to define a plurality of magnetic bits having sidewalls. The second silicon nitride layer is patterned to define electrical contact portions on the etch stop in each magnetic bit. The sidewalls of the magnetic bits are covered with a photoresist layer. A reactive ion etch (RIE) process is used to etch into the first silicon nitride and silicon oxide layers to expose electrical contacts. The photoresist layer and silicon nitride layers protect the magnetoresistive layers from exposure to oxygen during the etching into the silicon oxide layer.
    Type: Application
    Filed: November 12, 2003
    Publication date: May 12, 2005
    Applicant: Honeywell International Inc.
    Inventors: Daniel Baseman, Lonny Berg, Romney Katti, Daniel Reed, Gordon Shaw, Wei Zou