Patents by Inventor Daniel Beitel

Daniel Beitel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11765149
    Abstract: A first instruction to store an entity identification (ID) in a memory of a device may be received. The entity ID may be stored in the memory in response to receiving the first instruction. Furthermore, a second instruction to store a value based on a key in the memory of the device may be received. A determination may be made as to whether the value based on the key that is to be stored in the memory corresponds to the entity ID that is stored in the memory. The value based on the key may be stored in the memory of the device when the value based on the key corresponds to the entity ID.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: September 19, 2023
    Assignee: Cryptography Research, Inc.
    Inventors: Ambuj Kumar, Daniel Beitel, Benjamin Che-Ming Jun
  • Publication number: 20200120077
    Abstract: A first instruction to store an entity identification (ID) in a memory of a device may be received. The entity ID may be stored in the memory in response to receiving the first instruction. Furthermore, a second instruction to store a value based on a key in the memory of the device may be received. A determination may be made as to whether the value based on the key that is to be stored in the memory corresponds to the entity ID that is stored in the memory. The value based on the key may be stored in the memory of the device when the value based on the key corresponds to the entity ID.
    Type: Application
    Filed: October 4, 2019
    Publication date: April 16, 2020
    Inventors: Ambuj Kumar, Daniel Beitel, Benjamin Che-Ming Jun
  • Patent number: 10440000
    Abstract: A first instruction to store an entity identification (ID) in a memory of a device may be received. The entity ID may be stored in the memory in response to receiving the first instruction. Furthermore, a second instruction to store a value based on a key in the memory of the device may be received. A determination may be made as to whether the value based on the key that is to be stored in the memory corresponds to the entity ID that is stored in the memory. The value based on the key may be stored in the memory of the device when the value based on the key corresponds to the entity ID.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: October 8, 2019
    Assignee: Cryptography Research, Inc.
    Inventors: Ambuj Kumar, Daniel Beitel, Benjamin Che-Ming Jun
  • Publication number: 20170142083
    Abstract: A first instruction to store an entity identification (ID) in a memory of a device may be received. The entity ID may be stored in the memory in response to receiving the first instruction. Furthermore, a second instruction to store a value based on a key in the memory of the device may be received. A determination may be made as to whether the value based on the key that is to be stored in the memory corresponds to the entity ID that is stored in the memory. The value based on the key may be stored in the memory of the device when the value based on the key corresponds to the entity ID.
    Type: Application
    Filed: July 9, 2015
    Publication date: May 18, 2017
    Inventors: Ambuj KUMAR, Daniel BEITEL, Benjamin Che-Ming JUN
  • Patent number: 9436848
    Abstract: A computing device receives a feature name or key name for an integrated circuit comprising a security manager core and an additional component. At least one of a) the additional component is associated with the key name or b) a feature provided by the additional component is associated with the feature name. The computing device receives a specified number of bits associated with the feature name or the key name, and maps the feature name to a feature address space or the key name to a key interface of the security manager core based at on the specified number of bits. The computing device generates at least one hardware description logic (HDL) module based on the mapping, wherein the at least one HDL module is usable to configure the security manager core for delivery of payloads associated with the feature name or the key name to the additional component.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: September 6, 2016
    Assignee: CRYPTOGRAPHY RESEARCH, INC.
    Inventors: Daniel Beitel, Lauren Gao, Christopher Gori, Paul Carl Kocher, Ambuj Kumar, Andrew John Leiserson
  • Publication number: 20140359755
    Abstract: A computing device receives a feature name or key name for an integrated circuit comprising a security manager core and an additional component. At least one of a) the additional component is associated with the key name or b) a feature provided by the additional component is associated with the feature name. The computing device receives a specified number of bits associated with the feature name or the key name, and maps the feature name to a feature address space or the key name to a key interface of the security manager core based at on the specified number of bits. The computing device generates at least one hardware description logic (HDL) module based on the mapping, wherein the at least one HDL module is usable to configure the security manager core for delivery of payloads associated with the feature name or the key name to the additional component.
    Type: Application
    Filed: May 28, 2014
    Publication date: December 4, 2014
    Applicant: Cryptography Research, Inc.
    Inventors: Daniel Beitel, Lauren Gao, Christopher Gori, Paul Carl Kocher, Ambuj Kumar, Andrew John Leiserson