Patents by Inventor Daniel Benjamin Stewart

Daniel Benjamin Stewart has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MEMORY MODULE MULTIPLE PORT BUFFER TECHNIQUES
    Publication number: 20230127970
    Abstract: The present disclosure provides techniques for using a multiple-port buffer to improve a transaction rate of a memory module. In an example, a memory module can include a circuit board having an external interface, first memory devices mounted to the circuit board, and a first multiple-port buffer circuit mounted to the circuit board. The first multiple-port buffer circuit can include a first port coupled to data lines of the external interface, the first port configured to operate at a first transaction rate, a second port coupled to data lines of a first plurality of the first memory devices, and a third port coupled to data lines of a second plurality of the first memory devices. The second and third ports can be configured to operate at a second transaction rate, wherein the second transaction rate is slower than the first transaction rate.
    Type: Application
    Filed: December 22, 2022
    Publication date: April 27, 2023
    Inventors: Jasper S. Gibbons, Matthew A. Prather, Brent Keeth, Frank F. Ross, Daniel Benjamin Stewart, Randall J. Rooney
  • Memory module multiple port buffer techniques
    Patent number: 11538508
    Abstract: The present disclosure provides techniques for using a multiple-port buffer to improve a transaction rate of a memory module. In an example, a memory module can include a circuit board having an external interface, first memory devices mounted to the circuit board, and a first multiple-port buffer circuit mounted to the circuit board. The first multiple-port buffer circuit can include a first port coupled to data lines of the external interface, the first port configured to operate at a first transaction rate, a second port coupled to data lines of a first plurality of the first memory devices, and a third port coupled to data lines of a second plurality of the first memory devices. The second and third ports can be configured to operate at a second transaction rate, wherein the second transaction rate is slower than the first transaction rate.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: December 27, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Jasper S. Gibbons, Matthew A. Prather, Brent Keeth, Frank F Ross, Daniel Benjamin Stewart, Randall J. Rooney
  • MEMORY MODULE MUTIPLE PORT BUFFER TECHNIQUES
    Publication number: 20210201966
    Abstract: The present disclosure provides techniques for using a multiple-port buffer to improve a transaction rate of a memory module. In an example, a memory module can include a circuit board having an external interface, first memory devices mounted to the circuit board, and a first multiple-port buffer circuit mounted to the circuit board. The first multiple-port buffer circuit can include a first port coupled to data lines of the external interface, the first port configured to operate at a first transaction rate, a second port coupled to data lines of a first plurality of the first memory devices, and a third port coupled to data lines of a second plurality of the first memory devices. The second and third ports can be configured to operate at a second transaction rate, wherein the second transaction rate is slower than the first transaction rate.
    Type: Application
    Filed: December 30, 2020
    Publication date: July 1, 2021
    Inventors: Jasper S. Gibbons, Matthew A. Prather, Brent Keeth, Frank F. Ross, Daniel Benjamin Stewart, Randall J. Rooney