Abstract: A user-space emulation framework for heterogeneous system-on-chip (SoC) design is provided. Embodiments described herein propose a portable, Linux-based emulation framework to provide an ecosystem for hardware-software co-design of heterogenous SoCs (e.g., domain-specific SoCs (DSSoCs)) and enable their rapid evaluation during the pre-silicon design phase. This framework holistically targets three key challenges of heterogeneous SoC design: accelerator integration, resource management, and application development. These challenges are addressed via a flexible and lightweight user-space runtime environment that enables easy integration of new accelerators, scheduling heuristics, and user applications, and the utility of each is illustrated through various case studies. A prototype compilation toolchain is introduced that enables automatic mapping of unlabeled C code to heterogeneous SoC platforms.

Abstract: Runtime task scheduling using imitation learning (IL) for heterogenous many-core systems is provided. Domain-specific systems-on-chip (DSSoCs) are recognized as a key approach to narrow down the performance and energy-efficiency gap between custom hardware accelerators and programmable processors. Reaching the full potential of these architectures depends critically on optimally scheduling the applications to available resources at runtime. Existing optimization-based techniques cannot achieve this objective at runtime due to the combinatorial nature of the task scheduling problem. In an exemplary aspect described herein, scheduling is posed as a classification problem, and embodiments propose a hierarchical IL-based scheduler that learns from an Oracle to maximize the performance of multiple domain-specific applications. Extensive evaluations show that the proposed IL-based scheduler approximates an offline Oracle policy with more than 99% accuracy for performance- and energy-based optimization objectives.

Abstract: Hierarchical and lightweight imitation learning (IL) for power management of embedded systems-on-chip (SoCs), also referred to herein as HiLITE, is provided. Modern SoCs use dynamic power management (DPM) techniques to improve energy efficiency. However, existing techniques are unable to efficiently adapt the mntime decisions considering multiple objectives (e.g., energy and real-time requirements) simultaneously on heterogeneous platforms. To address this need, embodiments described herein propose HiLITE, a hierarchical IL framework that maximizes energy efficiency while satisfying soft real-time constraints on embedded SoCs. This approach first trains DPM policies using IL; then, it applies a regression policy at runtime to minimize deadline misses. HiLITE improves the energy-delay product by 40% on average, and reduces deadline misses by up to 76%, compared to state-of-the-art approaches.

Abstract: The present disclosure relates to a heart rate monitoring method based on heartbeat harmonics. First, mixed data of a subject, which includes a fundamental respiration signal, respiration harmonics, a fundamental heartbeat signal, and heartbeat harmonics, is acquired by scanning a set of range bins. Range Doppler processing of the mixed data is performed to determine a range bin of interest. Data spectrum is then extracted based on a portion of the mixed data acquired at the range bin of interest. Next, the data spectrum is adaptively filtered to at least remove a spectrum peak of the fundamental respiration signal and a spectrum peak of the fundamental heartbeat signal mixed with a portion of respiration harmonics that are spectrally close to the fundamental heartbeat signal. Finally, the fundamental heartbeat signal is recovered based on a strongest heartbeat harmonic in the filtered data spectrum.

Abstract: The present disclosure relates to a heart rate monitoring method based on heartbeat harmonics. First, mixed data of a subject, which includes a fundamental respiration signal, respiration harmonics, a fundamental heartbeat signal, and heartbeat harmonics, is acquired by scanning a set of range bins. Range Doppler processing of the mixed data is performed to determine a range bin of interest. Data spectrum is then extracted based on a portion of the mixed data acquired at the range bin of interest. Next, the data spectrum is adaptively filtered to at least remove a spectrum peak of the fundamental respiration signal and a spectrum peak of the fundamental heartbeat signal mixed with a portion of respiration harmonics that are spectrally close to the fundamental heartbeat signal. Finally, the fundamental heartbeat signal is recovered based on a strongest heartbeat harmonic in the filtered data spectrum.