Patents by Inventor Daniel Boals

Daniel Boals has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12314177
    Abstract: A total count for an address mapping table is maintained, wherein the total count reflects a total number of updates to the address mapping table, and wherein the address mapping table comprises a plurality of sections. Respective section counts for the plurality of sections are maintained, wherein each respective section count reflects a total number of updates to a corresponding section. It is determined that the total count for the address mapping table satisfies a threshold criterion. A first section of the plurality of sections with a highest section count is identified based on the respective section counts. The first section of the address mapping table is written to a non-volatile memory device.
    Type: Grant
    Filed: February 15, 2024
    Date of Patent: May 27, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Byron Harris, Daniel Boals, Abedon Madril
  • Patent number: 12066930
    Abstract: A journal count reflecting a number of logical-to-physical (L2P) journals written to a non-volatile memory device is maintained, wherein each L2P journal is associated with one or more updates to an L2P address mapping table. In response to determining that the journal count satisfies a threshold criterion, a first section of a plurality of sections of the L2P address mapping table is identified, wherein the plurality of sections of the L2P address mapping table is cached in a volatile memory device. The first section of the L2P address mapping table is written to the non-volatile memory device.
    Type: Grant
    Filed: May 23, 2023
    Date of Patent: August 20, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Byron Harris, Daniel Boals, Abedon Madril
  • Publication number: 20240184695
    Abstract: A total count for an address mapping table is maintained, wherein the total count reflects a total number of updates to the address mapping table, and wherein the address mapping table comprises a plurality of sections. Respective section counts for the plurality of sections are maintained, wherein each respective section count reflects a total number of updates to a corresponding section. It is determined that the total count for the address mapping table satisfies a threshold criterion. A first section of the plurality of sections with a highest section count is identified based on the respective section counts. The first section of the address mapping table is written to a non-volatile memory device.
    Type: Application
    Filed: February 15, 2024
    Publication date: June 6, 2024
    Inventors: Byron Harris, Daniel Boals, Abedon Madril
  • Patent number: 11940912
    Abstract: A logical-to-physical (L2P) table is maintained, wherein a plurality of sections of the L2P table is cached in a volatile memory device. A total dirty count for the L2P table is maintained, wherein the total dirty count reflects a total number of updates to the L2P table. Respective section dirty counts for the plurality of sections are maintained, wherein each respective section dirty count reflects a total number of updates to a corresponding section. It is determined that the total dirty count for the L2P table satisfies a threshold criterion. In response to determining that the total dirty count for the L2P table satisfies the threshold criterion, a first section of the plurality of sections is identified based on the respective section dirty counts. The first section of the L2P table is written to a non-volatile memory device.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: March 26, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Byron Harris, Daniel Boals, Abedon Madril
  • Publication number: 20230289285
    Abstract: A journal count reflecting a number of logical-to-physical (L2P) journals written to a non-volatile memory device is maintained, wherein each L2P journal is associated with one or more updates to an L2P address mapping table. In response to determining that the journal count satisfies a threshold criterion, a first section of a plurality of sections of the L2P address mapping table is identified, wherein the plurality of sections of the L2P address mapping table is cached in a volatile memory device. The first section of the L2P address mapping table is written to the non-volatile memory device.
    Type: Application
    Filed: May 23, 2023
    Publication date: September 14, 2023
    Inventors: Byron Harris, Daniel Boals, Abedon Madril
  • Publication number: 20230281123
    Abstract: A logical-to-physical (L2P) table is maintained, wherein a plurality of sections of the L2P table is cached in a volatile memory device. A total dirty count for the L2P table is maintained, wherein the total dirty count reflects a total number of updates to the L2P table. Respective section dirty counts for the plurality of sections are maintained, wherein each respective section dirty count reflects a total number of updates to a corresponding section. It is determined that the total dirty count for the L2P table satisfies a threshold criterion. In response to determining that the total dirty count for the L2P table satisfies the threshold criterion, a first section of the plurality of sections is identified based on the respective section dirty counts. The first section of the L2P table is written to a non-volatile memory device.
    Type: Application
    Filed: March 1, 2022
    Publication date: September 7, 2023
    Inventors: Byron Harris, Daniel Boals, Abedon Madril
  • Patent number: 11714748
    Abstract: A logical-to-physical (L2P) address mapping table is maintained, wherein a plurality of sections of the L2P address mapping table is cached in a volatile memory device. A journal entry count is maintained reflecting a number of L2P journal entries associated with an L2P journal. It is determined that the journal entry count satisfies a first threshold criterion. In response to determining that the journal entry count satisfies the first threshold criterion, a writing of the L2P journal to a non-volatile memory device is triggered. A written journal count reflecting a number of L2P journals written to the non-volatile memory device is maintained. In response to determining that the written journal count satisfies a second threshold criterion, a first section of the plurality of sections of the L2P address mapping table is identified. The first section of the L2P address mapping table is written to the non-volatile memory device.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: August 1, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Byron Harris, Daniel Boals, Abedon Madril
  • Publication number: 20080055280
    Abstract: A computer system which includes one or more wireless interface devices that are adapted to communicate with a remote host over a radio link. Each of the wireless interface devices is a pen-based device which includes an ink field in which pen events are translated into pen data packets and transmitted to the remote host over the radio link. Local inking is provided at the wireless interface device in order to maintain the pen paradigm in essentially real time.
    Type: Application
    Filed: October 18, 2007
    Publication date: March 6, 2008
    Inventors: Depeng Bi, Daniel Boals, S Gladwin, James Wilson, Jose George, Scott Merkle