Patents by Inventor Daniel Brian Willie

Daniel Brian Willie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Direct memory access controller system with message-based programming
    Patent number: 8108583
    Abstract: A data transfer system comprising a first bus interface, a second bus interface, a first-in-first-out memory, a controller and a message unit. The message unit is operable to queue a plurality of data transfer request messages from the first bus interface and the second bus interface. The controller is operable to process each data transfer request message and transfer data between the first bus interface, the first-in-first-out memory and the second bus interface. The controller is configured to calculate error detection codes (EDCs) and chain EDC values.
    Type: Grant
    Filed: March 23, 2005
    Date of Patent: January 31, 2012
    Assignee: Emulex Design & Manufacturing Corporation
    Inventors: Shawn Adam Clayton, Brian Mark Fortin, Daniel Brian Willie, John Leland Wood
  • Direct memory access controller system with message-based programming
    Patent number: 6874054
    Abstract: A data transfer system comprising a first bus interface, a second bus interface, a first-in-first-out memory, a controller and a message unit. The message unit is operable to queue a plurality of data transfer request messages from the first bus interface and the second bus interface. The controller is operable to process each data transfer request message and transfer data between the first bus interface, the first-in-first-out memory and the second bus interface. The controller is configured to calculate error detection codes (EDCs) and chain EDC values.
    Type: Grant
    Filed: December 19, 2002
    Date of Patent: March 29, 2005
    Assignee: Emulex Design & Manufacturing Corporation
    Inventors: Shawn Adam Clayton, Brian Mark Fortin, Daniel Brian Willie, John Leland Wood
  • Direct memory access controller system
    Publication number: 20040123013
    Abstract: A data transfer system comprising a first bus interface, a second bus interface, a first-in-first-out memory, a controller and a message unit. The message unit is operable to queue a plurality of data transfer request messages from the first bus interface and the second bus interface. The controller is operable to process each data transfer request message and transfer data between the first bus interface, the first-in-first-out memory and the second bus interface. The controller is configured to calculate error detection codes (EDCs) and chain EDC values.
    Type: Application
    Filed: December 19, 2002
    Publication date: June 24, 2004
    Inventors: Shawn Adam Clayton, Brian Mark Fortin, Daniel Brian Willie, John Leland Wood