Patents by Inventor Daniel BUCKMINSTER

Daniel BUCKMINSTER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Stacked die integrated circuit
    Patent number: 9991231
    Abstract: An apparatus relates generally to an integrated circuit package. In such an apparatus, a package substrate has a first plurality of via structures extending from a lower surface of the package substrate to an upper surface of the package substrate. An die has a second plurality of via structures extending to a lower surface of the die. The lower surface of the die faces the upper surface of the package substrate in the integrated circuit package. The package substrate does not include a redistribution layer. The die and the package substrate are coupled to one another.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: June 5, 2018
    Assignee: Invensas Corporation
    Inventors: Charles G. Woychik, Cyprian Emeka Uzoh, Ron Zhang, Daniel Buckminster, Guilian Gao
  • STACKED DIE INTEGRATED CIRCUIT
    Publication number: 20170033088
    Abstract: An apparatus relates generally to an integrated circuit package. In such an apparatus, a package substrate has a first plurality of via structures extending from a lower surface of the package substrate to an upper surface of the package substrate. An die has a second plurality of via structures extending to a lower surface of the die. The lower surface of the die faces the upper surface of the package substrate in the integrated circuit package. The package substrate does not include a redistribution layer. The die and the package substrate are coupled to one another.
    Type: Application
    Filed: August 11, 2016
    Publication date: February 2, 2017
    Applicant: Invensas Corporation
    Inventors: Charles G. Woychik, Cyprian Emeka Uzoh, Ron Zhang, Daniel Buckminster, Guilian Gao
  • Stacked die integrated circuit
    Patent number: 9418924
    Abstract: An apparatus relates generally to an integrated circuit package. In such an apparatus, a package substrate has a first plurality of via structures extending from a lower surface of the package substrate to an upper surface of the package substrate. An die has a second plurality of via structures extending to a lower surface of the die. The lower surface of the die faces the upper surface of the package substrate in the integrated circuit package. The package substrate does not include a redistribution layer. The die and the package substrate are coupled to one another.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: August 16, 2016
    Assignee: Invensas Corporation
    Inventors: Charles G. Woychik, Cyprian Emeka Uzoh, Ron Zhang, Daniel Buckminster, Guilian Gao
  • STACKED DIE INTEGRATED CIRCUIT
    Publication number: 20150270209
    Abstract: An apparatus relates generally to an integrated circuit package. In such an apparatus, a package substrate has a first plurality of via structures extending from a lower surface of the package substrate to an upper surface of the package substrate. An die has a second plurality of via structures extending to a lower surface of the die. The lower surface of the die faces the upper surface of the package substrate in the integrated circuit package. The package substrate does not include a redistribution layer. The die and the package substrate are coupled to one another.
    Type: Application
    Filed: March 20, 2014
    Publication date: September 24, 2015
    Applicant: INVENSAS CORPORATION
    Inventors: Charles G. WOYCHIK, Cyprian Emeka UZOH, Ron ZHANG, Daniel BUCKMINSTER, Guilian GAO