Patents by Inventor Daniel C. Hantz

Daniel C. Hantz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11636036
    Abstract: Various multi-processor unified memory management systems and methods are detailed herein. In embodiments detailed herein, inter-chip memory management modules may be executed by processors that are in communication via an inter-chip link. A flat memory map may be used across the multiple processors of the system. Each inter-chip memory management module may analyze memory transactions. If the memory transaction is directed to a portion of the flat memory map managed by another processor, the memory-transaction may be translated to a non-memory mapped transaction and transmitted via an inter-chip communication link.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: April 25, 2023
    Assignee: Hughes Network Systems, LLC
    Inventors: Gaurav Bhatia, Daniel C. Hantz, Ashish A. Varhale, Karan Kakkar, Yingquan Cheng, Yogesh Sethi
  • Publication number: 20220222179
    Abstract: Various multi-processor unified memory management systems and methods are detailed herein. In embodiments detailed herein, inter-chip memory management modules may be executed by processors that are in communication via an inter-chip link. A flat memory map may be used across the multiple processors of the system. Each inter-chip memory management module may analyze memory transactions. If the memory transaction is directed to a portion of the flat memory map managed by another processor, the memory-transaction may be translated to a non-memory mapped transaction and transmitted via an inter-chip communication link.
    Type: Application
    Filed: January 28, 2022
    Publication date: July 14, 2022
    Inventors: Gaurav Bhatia, Daniel C. Hantz, Ashish A. Varhale, Karan Kakkar, Yingquan Cheng, Yogesh Sethi
  • Publication number: 20220091981
    Abstract: Various multi-processor unified memory management systems and methods are detailed herein. In embodiments detailed herein, inter-chip memory management modules may be executed by processors that are in communication via an inter-chip link. A flat memory map may be used across the multiple processors of the system. Each inter-chip memory management module may analyze memory transactions. If the memory transaction is directed to a portion of the flat memory map managed by another processor, the memory-transaction may be translated to a non-memory mapped transaction and transmitted via an inter-chip communication link.
    Type: Application
    Filed: September 24, 2020
    Publication date: March 24, 2022
    Inventors: Gaurav Bhatia, Daniel C. Hantz, Ashish A. Varhale, Karan Kakkar, Yingquan Cheng, Yogesh Sethi
  • Patent number: 11281583
    Abstract: Various multi-processor unified memory management systems and methods are detailed herein. In embodiments detailed herein, inter-chip memory management modules may be executed by processors that are in communication via an inter-chip link. A flat memory map may be used across the multiple processors of the system. Each inter-chip memory management module may analyze memory transactions. If the memory transaction is directed to a portion of the flat memory map managed by another processor, the memory-transaction may be translated to a non-memory mapped transaction and transmitted via an inter-chip communication link.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: March 22, 2022
    Assignee: Hughes Network Systems, LLC
    Inventors: Gaurav Bhatia, Daniel C. Hantz, Ashish A. Varhale, Karan Kakkar, Yingquan Cheng, Yogesh Sethi