Patents by Inventor Daniel C. Laroche

Daniel C. Laroche has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10241946
    Abstract: A method, system, and apparatus are provided for managing multiple DMA channels in different DMA modes by processing command sequences associated with different virtual DMA channels and stored in a command queue structure, such that a first command sequence is processed to directly configure one or more first register descriptors at a context store to implement a direct configuration DMA mode for a first virtual channel, a second command sequence is processed to initiate a fetch of a linked list descriptor chain for loading one or more second register descriptors at a second DMA channel context store register to implement a link list configuration DMA mode for a second virtual channel, and a third command sequence is processed to retrieve an instruction program for loading into the command queue structure and execution by the DMA controller to implement a program configuration DMA mode for a third virtual channel.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: March 26, 2019
    Assignee: NXP USA, Inc.
    Inventors: Michael J. Rochford, Rabindra Guha, Daniel C. Laroche, Malcolm D. Stewart
  • Publication number: 20180203815
    Abstract: A method, system, and apparatus are provided for managing multiple DMA channels in different DMA modes by processing command sequences associated with different virtual DMA channels and stored in a command queue structure, such that a first command sequence is processed to directly configure one or more first register descriptors at a context store to implement a direct configuration DMA mode for a first virtual channel, a second command sequence is processed to initiate a fetch of a linked list descriptor chain for loading one or more second register descriptors at a second DMA channel context store register to implement a link list configuration DMA mode for a second virtual channel, and a third command sequence is processed to retrieve an instruction program for loading into the command queue structure and execution by the DMA controller to implement a program configuration DMA mode for a third virtual channel.
    Type: Application
    Filed: January 18, 2017
    Publication date: July 19, 2018
    Applicant: NXP USA, Inc.
    Inventors: Michael J. Rochford, Rabindra Guha, Daniel C. Laroche, Malcolm D. Stewart