Abstract: A dynamically reconfigurable data storage system includes a plurality of storage system controllers, each of which is selectively operable at any given time as one of a channel adapter and a storage device adapter as established by commands received by each of the controllers. At least one semiconductor memory is coupled to the storage system controllers. Additionally, a data storage system director issues commands to each of the storage system controllers for establishing a first quantity of the system controllers as channel adapters, for transmitting and receiving at least data and commands to and from one or more host computers over a plurality of data communication channels. The data storage system director also establishes a second quantity of the storage system controllers as storage device adapters, for cotrolling data transfer to and from a plurality of data storage devices.

Abstract: A method for assuring data write integrity on a data storage device includes storing data in a temporary memory storage medium after receipt of the data and prior to writing the data to a storage device. After the data is written to a storage device, the data itself, or an error checking and correction code is read and compared with the original data or with the data error checking and correction code. If no error occurs, new data is received written, read and compared. If an error has occurred, the method re-writes the data to the same or a re-assigned location on the data storage device prior to writing, reading and comparing the data again. Thus, data is written and compared prior to removing the data from a temporary memory storage medium to assure data write integrity.

Abstract: An apparatus and method for disk mapping and data retrieval includes a data storage medium on which has been stored a plurality of data records. Each record includes at least a record identification portion, for uniquely identifying each record from among the plurality of data records. The apparatus builds a record locator table and high speed semiconductor memory which comprises the unique record identifiers for the records on the storage medium as well as a record locator index generated by the apparatus, which indicates the address of the data record on the storage medium. Data retrieval is facilitated by first searching the record locator table in high speed semiconductor memory for a requested data record. Utilizing the record locator index associated with the reqested data record, the system directly accesses the requested data record on the storage medium thereby minimizing storage medium search time.

Abstract: A system for generating memory timing signals and for reducing memory access time includes a plurality of memory modules having an array of memory cells addressable in response to a number of row address select and column address select signals. A row address select signal generator associated with each memory module generates row address signals upon the system receiving a request for access to any memory storage location. At least one memory array selection comparator compares memory address signals with preselected, unique, memory module addresses, for identifying a selected memory module, and for providing a column address signal generator enable signal to the column address select signal generator of the selected memory module.