Abstract: An apparatus comprising first circuitry to determine a time parameter associated with a storage operation; and second circuitry to generate a storage command, the storage command including the time parameter, a location for the storage operation, and an opcode specifying the storage operation.

Abstract: Techniques for time-aware remote data transfers. A time may be associated with a remote direct memory access (RDMA) operation in a translation protection table (TPT). The RDMA operation may be permitted or restricted based on the time in the TPT.

Abstract: Examples described herein relate to a in a group of servers: the servers attempting to perform timing synchronization based on a first group of timing signals sent via a first path. In some examples, the first comprises a first connection and based on disruption of communications by the first connection between servers in the group of servers. In some examples, the servers attempting to perform timing synchronization based on a second group of timing signals sent via a second path. In some examples, the second path does not traverse the first connection.

Abstract: Examples described herein relate to a network interface device that includes a host interface; a network interface; and circuitry to: receive time information of a device that executes a service and based on the time information being outside of a permitted jitter range for the service, perform one or more actions to cause execution of the service on a device that operates based on a clock signal within a permitted jitter range.

Abstract: Examples described herein relate to a network interface device comprising an interface to memory and circuitry. In some examples, the circuitry is to: determine a number of data units stored in a page in the memory and based on no data unit stored in a page of memory, permit storage of a data unit in the page in the memory.

Abstract: Examples described herein relate to a network interface device that includes circuitry to determine a target time domain in which to translate a time stamp associated with a workload and identify the target time domain to cause translation of the time stamp associated with the workload to the target time domain. In some examples, the network interface device stores time domain translation parameters of time stamps from a first time domain to one or more time domains and the network interface device translates the time stamp from the first time domain to the one or more time domains. In some examples, the network interface device comprises circuitry to store time domain translation parameters of time stamps from a first time domain to one or more time domains and the server is to perform translation of the time stamp from the first time domain to the one or more time domains based on the time domain translation parameters.

Abstract: A packet processing device, a method to be performed at the packet processing device, a computer-readable storage medium, and a computing system. The packet processing device is to determine a computing unit of the server architecture, the computing unit to execute a workload; receive a data packet including data to be used by the computing unit to execute the workload; determine, based on the computing unit to execute the workload, a memory of the server architecture to store the data for access by the computing unit to execute the workload; and route the data to the server architecture for storage at the memory.

Abstract: Optical and electrical modules with enhanced features and associated apparatus and methods. The optical modules are configured to implement one or more features that are offloaded from Ethernet devices to which the optical modules are configured to be attached. The features include support for timestamping packets and preamble using IEEE 1588 Precision Time Protocol (PTP) profiles, support for implementing IEEE 1588 one-step operations, support for implementing IEEE 1588 Ethernet Synchronous Clocks (SyncE) profiles, support for In-Band Network Telemetry (INT), and support for implementing a MACsec security protocol defined by IEEE standard 802.1AD. The enhanced features provided by the optical modules enable Ethernet devices to be upgraded to support the enhanced features by replacing conventional optical modules with the optical modules disclosed herein. Support for White Rabbit IEEE PTP and SyncE profiles is also provided.

Abstract: A passive optical network is used for communications in a data center between an Optical Line Terminal (OLT) in an Ethernet switch and an Optical Network Terminal (ONT) in a compute node in a server. The passive optical network reduces the latency from microseconds to single digit nanoseconds in both upstream and downstream directions that can result in an increase in application performance. In addition, because the passive optical network does not use active components, the passive optical network has a reduced Mean Time Between Failures that can be decades or centuries.

Abstract: Techniques to operate a time division multiplexing (TDM) media access control (MAC) module include examples of facilitating use of shared resources allocated to ports of a network interface based on a time slot mechanism. The shared resources allocated to process packet data received or sent through the ports of the network interface.

Abstract: Examples described herein relate to a network interface device. The network interface device can include circuitry to select a packet for transmission from among at least one time-based queue and at least one priority-based queue based on a departure time stamp value associated with the packet and a current time value. The network interface device can include circuitry to cause transmission of the selected packet. The circuitry can select a packet for transmission from the at least one time-based queue based on the current time value and based on the associated departure time stamp value.

Abstract: Techniques to operate a time division multiplexing (TDM) media access control (MAC) module include examples of facilitating use of shared resources allocated to ports of a network interface based on a time slot mechanism. The shared resources allocated to process packet data received or sent through the ports of the network interface.

Abstract: A compute device can access local or remote accelerator devices for use in processing a received packet. The received packet can be processed by any combination of local accelerator devices and remote accelerator devices. In some cases, the received packet can be encapsulated in an encapsulating packet and sent to a remote accelerator device for processing. The encapsulating packet can indicate a priority level for processing the received packet and its associated processing task. The priority level can override a priority level that would otherwise be assigned to the received packet and its associated processing task. The remote accelerator device can specify a fullness of an input queue to the compute device. Other information can be conveyed by packets transmitted between and among compute devices and remote accelerator devices to assist in determining an accelerator to use or other uses.

Abstract: Received undersized Ethernet frames are isolated and discarded in a Media Access Control (MAC) sublayer having a bus width greater than the number of bytes in a received minimum size Ethernet frame. The MAC sublayer maintains one counter to track the total number of undersized frames (undersized frames with good Cyclic Redundancy Check (CRC)) and runts with bad CRC). Undersized Ethernet frames are discarded by the MAC sublayer prior to calculating Cyclic Redundancy Check (CRC) for the Ethernet Frame.

Abstract: A network device in a network is provided that is configured to implement a process for modifying a timestamp in a packet that is a timing protocol packet. The timing protocol packet is encapsulated by a user data protocol (UDP) datagram, where the modified timestamp is written into the packet, but does not require a checksum of the UDP datagram to be changed. The process includes receiving a packet including a first timestamp over the network, receiving the first timestamp from the packet and a second timestamp to be written to the packet, and determining a third timestamp that is a modification of the second timestamp to be written to the packet, the third timestamp having least significant bits modified from the second timestamp such that the checksum of the UDP datagram is unchanged. The process writes the third timestamp into the packet and transmits the UDP datagram to the network.

Abstract: According to one aspect of the teachings herein, a method and apparatus predict a departure time of transmit data transmitted from a first network entity to a second network entity, determine a timing difference between a detected departure time and the predicted departure time of the transmit data that is was based on an estimated path delay of data transmission circuitry, and indicate the timing difference in further transmit data, e.g., to improve synchronization at the second network entity. In one or more embodiments, the timing difference is further used to compensate one or more timing operations at the first network entity, such as adapting one or more prediction parameters used by a departure-time prediction process.

Abstract: A network device in a network is provided that is configured to implement a process for modifying a timestamp in a packet that is a timing protocol packet. The timing protocol packet is encapsulated by a user data protocol (UDP) datagram, where the modified timestamp is written into the packet, but does not require a checksum of the UDP datagram to be changed. The process includes receiving a packet including a first timestamp over the network, receiving the first timestamp from the packet and a second timestamp to be written to the packet, and determining a third timestamp that is a modification of the second timestamp to be written to the packet, the third timestamp having least significant bits modified from the second timestamp such that the checksum of the UDP datagram is unchanged. The process writes the third timestamp into the packet and transmits the UDP datagram to the network.

Abstract: According to one aspect of the teachings herein, a method and apparatus predict a departure time of transmit data transmitted from a first network entity to a second network entity, determine a timing difference between a detected departure time and the predicted departure time of the transmit data that is was based on an estimated path delay of data transmission circuitry, and indicate the timing difference in further transmit data, e.g., to improve synchronization at the second network entity. In one or more embodiments, the timing difference is further used to compensate one or more timing operations at the first network entity, such as adapting one or more prediction parameters used by a departure-time prediction process.

Abstract: In one aspect of the teachings herein, a timing circuit detects the assertion of an incoming timing pulse signal at a timing resolution higher than that afforded by the sampling clock signal used to detect the assertion event. To do so, the timing circuit uses delay circuitry to obtain incrementally delayed versions of the incoming timing pulse signal or sampling clock signal. The delay increments are fractions of the sampling clock period and the timing circuit uses the delayed versions to determine a timing difference between actual assertion time of the incoming timing pulse signal and the sampling clock edge at which assertion of the incoming timing pulse signal is detected. In another aspect, a timing circuit uses similar delay techniques to control the timing of an outgoing timing pulse signal at a timing resolution higher than that afforded by the clock circuitry associated with generating the outgoing signal.

Abstract: Disclosed, inter alia, is a Physical Layer Transceiver (PHY) with integrated time synchronization, such as, but not limited to, IEEE 1588 Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems. The PHY includes circuitry to maintain a current time, and to trigger the storage of timestamps corresponding to received frames. Typically, in response to a request from an external device, the timestamps are retrieved from storage and are communicated to the external device. By moving the triggering of the storage of the timestamps by the PHY itself, rather than by a monitoring of the traffic between the PHY and the Media Access Controller (MAC), higher accuracy can typically be achieved.