Patents by Inventor Daniel Christopher Worledge

Daniel Christopher Worledge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8785966
    Abstract: Magnetic tunnel junction transistor devices and methods for operating and forming magnetic tunnel junction transistor devices. In one aspect, a magnetic tunnel junction transistor device includes a first source/drain electrode, a second source/drain electrode, a gate electrode, and a magnetic tunnel junction disposed between the gate electrode and the second source/drain electrode. The magnetic tunnel junction includes a magnetic free layer that extends along a length of the gate electrode toward the first source/drain electrode such that an end portion of the magnetic free layer is disposed between the gate electrode and the first source/drain electrode. The magnetic tunnel junction transistor device switches a magnetization orientation of the magnetic free layer by application of a gate voltage to the gate electrode, thereby changing a resistance between the first and second source/drain electrodes through the magnetic free layer.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: July 22, 2014
    Assignee: International Business Machines Corporation
    Inventors: Daniel Christopher Worledge, Vladislav Korenivski
  • Patent number: 8358153
    Abstract: A magnetic circuit in one aspect comprises a plurality of tapered magnetic wires each having a relatively wide input end and a relatively narrow output end, with the output end of a first one of the tapered magnetic wires being coupled to the input end of a second one of the tapered magnetic wires. Each of the tapered magnetic wires is configured to propagate a magnetic domain wall along a length of the wire in a direction of decreasing width from its input end to its output end. In an illustrative embodiment, the magnetic circuit comprises a logic buffer that includes at least one heating element. The heating element may be controlled to facilitate transfer of a magnetic moment from the output end of the first tapered magnetic wire to the input end of the second tapered magnetic wire.
    Type: Grant
    Filed: May 19, 2010
    Date of Patent: January 22, 2013
    Assignee: International Business Machines Corporation
    Inventors: Daniel Christopher Worledge, David William Abraham
  • Publication number: 20120329177
    Abstract: Magnetoresistive structures, devices, memories, and methods for forming the same are presented. For example, a magnetoresistive structure includes a ferromagnetic layer, a ferrimagnetic layer coupled to the ferromagnetic layer, a pinned layer and a nonmagnetic spacer layer. A free side of the magnetoresistive structure comprises the ferromagnetic layer and the ferrimagnetic layer. The nonmagnetic spacer layer is at least partly between the free side and the pinned layer. A saturation magnetization of the ferromagnetic layer opposes a saturation magnetization of the ferrimagnetic layer. The nonmagnetic spacer layer may include a tunnel barrier layer, such as one composed of magnesium oxide (MgO), or a nonmagnetic metal layer.
    Type: Application
    Filed: September 4, 2012
    Publication date: December 27, 2012
    Applicant: International Business Machines Corporation
    Inventors: David William Abraham, Guohan Hu, Jonathan Zanhong Sun, Daniel Christopher Worledge
  • Patent number: 8283741
    Abstract: A magnetic tunnel junction stack that includes a pinned magnetic layer, a tunnel barrier layer formed of magnesium oxide (MgO), and a free magnetic layer formed adjacent to the tunnel barrier layer and of a material having a magnetization perpendicular to an MgO interface of the tunnel barrier layer and with a magnetic moment per unit area within a factor of 2 of approximately 2 nanometers (nm)×300 electromagnetic units per cubic centimeter (emu/cm3).
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: October 9, 2012
    Assignee: International Business Machines Corporation
    Inventors: Guohan Hu, Jonathan Z. Sun, Daniel Christopher Worledge
  • Patent number: 8102174
    Abstract: Probes are electrically connected to a surface of a tunnel junction film stack comprising a free layer, a tunnel barrier, and a pinned layer. Resistances are determined for a variety of probe spacings and for a number of magnetizations of one of the layers of the stack. The probe spacings are a distance from a length scale, which is related to the Resistance-Area (RA) product of the tunnel junction film stack. Spacings from as small as possible to about 40 times the length scale are used. Beneficially, the smallest spacing between probes used during a resistance measurement is under 100 microns. A measured in-plane MagnetoResistance (MR) curve is determined from the “high” and “low” resistances that occur at the two magnetizations of this layer. The RA product, resistances per square of the free and pinned layers, and perpendicular MR are determined through curve fitting.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: January 24, 2012
    Assignee: Infineon Technologies North America Corp.
    Inventors: Daniel Christopher Worledge, Philip Louis Trouilloud, David William Abraham, Joerg Dietrich Schmid
  • Publication number: 20110286255
    Abstract: A magnetic circuit in one aspect comprises a plurality of tapered magnetic wires each having a relatively wide input end and a relatively narrow output end, with the output end of a first one of the tapered magnetic wires being coupled to the input end of a second one of the tapered magnetic wires. Each of the tapered magnetic wires is configured to propagate a magnetic domain wall along a length of the wire in a direction of decreasing width from its input end to its output end. In an illustrative embodiment, the magnetic circuit comprises a logic buffer that includes at least one heating element. The heating element may be controlled to facilitate transfer of a magnetic moment from the output end of the first tapered magnetic wire to the input end of the second tapered magnetic wire.
    Type: Application
    Filed: May 19, 2010
    Publication date: November 24, 2011
    Applicant: International Business Machines Corporation
    Inventors: Daniel Christopher Worledge, David William Abraham
  • Patent number: 8034637
    Abstract: Techniques for exchange coupling of magnetic layers in semiconductor devices are provided. In one aspect, a semiconductor device is provided. The device comprises at least two magnetic layers, and a spacer layer formed between the magnetic layers, the spacer layer being configured to provide ferromagnetic exchange coupling between the layers, the magnetic layers experiencing anti-ferromagnetic dipole coupling, such that a net coupling of the magnetic layers is anti-ferromagnetic in a zero applied magnetic field. The semiconductor device may comprise magnetic random access memory (MRAM). In another aspect, a method for coupling magnetic layers in a semiconductor device comprising at least two magnetic layers and a spacer layer therebetween, the method comprises the following step.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: October 11, 2011
    Assignee: International Business Machines Corporation
    Inventor: Daniel Christopher Worledge
  • Patent number: 8027185
    Abstract: Probes are electrically connected to a surface of a tunnel junction film stack comprising a free layer, a tunnel barrier, and a pinned layer. Resistances are determined for a variety of probe spacings and for a number of magnetizations of one of the layers of the stack. The probe spacings are a distance from a length scale, which is related to the Resistance-Area (RA) product of the tunnel junction film stack. Spacings from as small as possible to about 40 times the length scale are used. Beneficially, the smallest spacing between probes used during a resistance measurement is under 100 microns. A measured in-plane MagnetoResistance (MR) curve is determined from the “high” and “low” resistances that occur at the two magnetizations of this layer. The RA product, resistances per square of the free and pinned layers, and perpendicular MR are determined through curve fitting.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: September 27, 2011
    Assignees: International Business Machines Corporation, Infineon Technologies North America Corp.
    Inventors: Daniel Christopher Worledge, Philip Louis Trouilloud, David William Abraham, Joerg Dietrich Schmid
  • Patent number: 8004278
    Abstract: Probes are electrically connected to a surface of a tunnel junction film stack comprising a free layer, a tunnel barrier, and a pinned layer. Resistances are determined for a variety of probe spacings and for a number of magnetizations of one of the layers of the stack. The probe spacings are a distance from a length scale, which is related to the Resistance-Area (RA) product of the tunnel junction film stack. Spacings from as small as possible to about 40 times the length scale are used. Beneficially, the smallest spacing between probes used during a resistance measurement is under 100 microns. A measured in-plane MagnetoResistance (MR) curve is determined from the “high” and “low” resistances that occur at the two magnetizations of this layer. The RA product, resistances per square of the free and pinned layers, and perpendicular MR are determined through curve fitting.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: August 23, 2011
    Assignees: International Business Machines Corporation, Infineon Technologies North America Corp.
    Inventors: Daniel Christopher Worledge, Philip Louis Trouilloud, David William Abraham, Joerg Dietrich Schmid
  • Publication number: 20100320550
    Abstract: Magnetoresistive structures, devices, memories, and methods for forming the same are presented. For example, a magnetoresistive structure includes a ferromagnetic layer, a ferrimagnetic layer coupled to the ferromagnetic layer, a pinned layer and a nonmagnetic spacer layer. A free side of the magnetoresistive structure comprises the ferromagnetic layer and the ferrimagnetic layer. The nonmagnetic spacer layer is at least partly between the free side and the pinned layer. A saturation magnetization of the ferromagnetic layer opposes a saturation magnetization of the ferrimagnetic layer. The nonmagnetic spacer layer may include a tunnel barrier layer, such as one composed of magnesium oxide (MgO), or a nonmagnetic metal layer.
    Type: Application
    Filed: June 23, 2009
    Publication date: December 23, 2010
    Applicant: International Business Machines Corporation
    Inventors: David William Abraham, Guohan Hu, Jonathan Zanhong Sun, Daniel Christopher Worledge
  • Publication number: 20100023287
    Abstract: Probes are electrically connected to a surface of a tunnel junction film stack comprising a free layer, a tunnel barrier, and a pinned layer. Resistances are determined for a variety of probe spacings and for a number of magnetizations of one of the layers of the stack. The probe spacings are a distance from a length scale, which is related to the Resistance-Area (RA) product of the tunnel junction film stack. Spacings from as small as possible to about 40 times the length scale are used. Beneficially, the smallest spacing between probes used during a resistance measurement is under 100 microns. A measured in-plane MagnetoResistance (MR) curve is determined from the “high” and “low” resistances that occur at the two magnetizations of this layer. The RA product, resistances per square of the free and pinned layers, and perpendicular MR are determined through curve fitting.
    Type: Application
    Filed: August 11, 2009
    Publication date: January 28, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Daniel Christopher Worledge, Philip Louis Trouilloud, David William Abraham, Joerg Dietrich Schmid
  • Publication number: 20090309587
    Abstract: Probes are electrically connected to a surface of a tunnel junction film stack comprising a free layer, a tunnel barrier, and a pinned layer. Resistances are determined for a variety of probe spacings and for a number of magnetizations of one of the layers of the stack. The probe spacings are a distance from a length scale, which is related to the Resistance-Area (RA) product of the tunnel junction film stack. Spacings from as small as possible to about 40 times the length scale are used. Beneficially, the smallest spacing between probes used during a resistance measurement is under 100 microns. A measured in-plane MagnetoResistance (MR) curve is determined from the “high” and “low” resistances that occur at the two magnetizations of this layer. The RA product, resistances per square of the free and pinned layers, and perpendicular MR are determined through curve fitting.
    Type: Application
    Filed: August 11, 2009
    Publication date: December 17, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Daniel Christopher Worledge, Philip Louis Trouilloud, David William Abraham, Joerg Dietrich Schmid
  • Patent number: 7622735
    Abstract: Probes are electrically connected to a surface of a tunnel junction film stack comprising a free layer, a tunnel barrier, and a pinned layer. Resistances are determined for a variety of probe spacings and for a number of magnetizations of one of the layers of the stack. The probe spacings are a distance from a length scale, which is related to the Resistance-Area (RA) product of the tunnel junction film stack. Spacings from as small as possible to about 40 times the length scale are used. Beneficially, the smallest spacing between probes used during a resistance measurement is under 100 microns. A measured in-plane MagnetoResistance (MR) curve is determined from the “high” and “low” resistances that occur at the two magnetizations of this layer. The RA product, resistances per square of the free and pinned layers, and perpendicular MR are determined through curve fitting.
    Type: Grant
    Filed: May 2, 2005
    Date of Patent: November 24, 2009
    Assignee: International Business Machines Corporation
    Inventors: Daniel Christopher Worledge, Philip Louis Trouilloud, David William Abraham, Joerg Dietrich Schmid
  • Publication number: 20090267597
    Abstract: Probes are electrically connected to a surface of a tunnel junction film stack comprising a free layer, a tunnel barrier, and a pinned layer. Resistances are determined for a variety of probe spacings and for a number of magnetizations of one of the layers of the stack. The probe spacings are a distance from a length scale, which is related to the Resistance-Area (RA) product of the tunnel junction film stack. Spacings from as small as possible to about 40 times the length scale are used. Beneficially, the smallest spacing between probes used during a resistance measurement is under 100 microns. A measured in-plane MagnetoResistance (MR) curve is determined from the “high” and “low” resistances that occur at the two magnetizations of this layer. The RA product, resistances per square of the free and pinned layers, and perpendicular MR are determined through curve fitting.
    Type: Application
    Filed: January 29, 2009
    Publication date: October 29, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Daniel Christopher Worledge, Philip Louis Trouilloud, David William Abraham, Joerg Dietrich Schmid
  • Publication number: 20090261820
    Abstract: Probes are electrically connected to a surface of a tunnel junction film stack comprising a free layer, a tunnel barrier, and a pinned layer. Resistances are determined for a variety of probe spacings and for a number of magnetizations of one of the layers of the stack. The probe spacings are a distance from a length scale, which is related to the Resistance-Area (RA) product of the tunnel junction film stack. Spacings from as small as possible to about 40 times the length scale are used. Beneficially, the smallest spacing between probes used during a resistance measurement is under 100 microns. A measured in-plane MagnetoResistance (MR) curve is determined from the “high” and “low” resistances that occur at the two magnetizations of this layer. The RA product, resistances per square of the free and pinned layers, and perpendicular MR are determined through curve fitting.
    Type: Application
    Filed: May 2, 2005
    Publication date: October 22, 2009
    Applicants: International Business Machines Corporation, Infineon Technologies North America Corp.
    Inventors: Daniel Christopher Worledge, Philip Louis Trouilloud, David William Abraham, Joerg Dietrich Schmid
  • Patent number: 7506236
    Abstract: Techniques for data storage are provided. In one aspect, a method for writing one or more magnetic memory cells comprises the following steps. Data is written to one or more of the magnetic memory cells. It is detected whether there are any errors in the data written to the one or more magnetic memory cells. The data is rewritten to each of the one or more previously written magnetic memory cells in which an error is detected.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: March 17, 2009
    Assignee: International Business Machines Corporation
    Inventors: William Joseph Gallagher, Daniel Christopher Worledge
  • Patent number: 7301801
    Abstract: Apparatus and methods for optimizing a toggle window for a magnetic tunnel junction (MTJ) having a multicomponent free layer are provided. In accordance with an aspect of the invention, a MTJ comprises a free layer, a pinned layer, and a barrier layer formed between the free layer and the pinned layer. The free layer, in turn, includes a plurality of free magnetic sublayers while the pinned layer includes a plurality of pinned magnetic sublayers. Each of the pinned magnetic sublayers exerts a magnetic field on the free magnetic sublayers. To optimize the toggle window for the device, the dimensions of each of the pinned magnetic sublayers are selected to substantially equalize average magnetic fields acting on each of the free magnetic sublayers.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: November 27, 2007
    Assignee: International Business Machines Corporation
    Inventors: David W. Abraham, Daniel Christopher Worledge
  • Patent number: 7081658
    Abstract: The present invention provides techniques for data storage. In one aspect of the invention, a semiconductor device is provided. The semiconductor device comprises at least one free layer and at least one fixed layer, with at least one barrier layer therebetween. At least one pinned magnetic layer is separated from the at least one free layer by at least one non-magnetic layer, the at least one pinned magnetic layer and non-magnetic layer being configured to cancel out at least a portion of a Neel coupling between the at least one free layer and the at least one fixed layer.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: July 25, 2006
    Assignees: International Business Machines Corporation, Infineon Technologies North America Corp.
    Inventors: Daniel Christopher Worledge, Ulrich Klostermann
  • Patent number: 6987691
    Abstract: Techniques for improved semiconductor device performance are provided. In one aspect, a semiconductor device is provided. The device comprises at least one free magnetic layer, and a magnetic amplifier interacting with the free magnetic layer comprising two or more magnetic layers with at least one nonmagnetic layer therebetween. The nonmagnetic layer may be configured to provide parallel exchange coupling J of the magnetic layers in a range of 0 < J < 4 ? ? ? ? t 2 ? M S 2 ? n y b , the magnetic layers having a long axis and a short axis, wherein t is a thickness of each magnetic layer, Ms is magnetization, ny is a demagnetizing factor defined along the short axis of the magnetic layers and b is a diameter along a short axis of the magnetic layers. A method for switching a semiconductor device having at least one free magnetic layer is also provided.
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: January 17, 2006
    Assignee: International Business Machines Corporation
    Inventor: Daniel Christopher Worledge
  • Patent number: 6927569
    Abstract: Probes are electrically connected to a surface of a tunnel junction film stack comprising a free layer, a tunnel barrier, and a pinned layer. Resistances are determined for a variety of probe spacings and for a number of magnetizations of one of the layers of the stack. The probe spacings are a distance from a length scale, which is related to the Resistance-Area (RA) product of the tunnel junction film stack. Spacings from as small as possible to about 40 times the length scale are used. Beneficially, the smallest spacing between probes used during a resistance measurement is under 100 microns. A measured in-plane MagnetoResistance (MR) curve is determined from the “high” and “low” resistances that occur at the two magnetizations of this layer. The RA product, resistances per square of the free and pinned layers, and perpendicular MR are determined through curve fitting.
    Type: Grant
    Filed: September 16, 2002
    Date of Patent: August 9, 2005
    Assignees: International Business Machines Corporation, Infineon Technologies AG
    Inventors: Daniel Christopher Worledge, Philip Louis Trouilloud, David William Abraham, Joerg Dietrich Schmid