Abstract: A programmable semiconductor antifuse structure and method of fabricating are provided which allow for miniaturization of components to an area of less than one micron. The cell exhibits a high pre-programmed resistance of more than 1.times.10.sup.7 ohms and has an extremely low programmed cell resistance of around 50 ohms.

Abstract: A programmable semiconductor antifuse structure and method of fabricating are provided which allow for miniaturization of components to an area of less than one micron. The cell exhibits a high pre-programmed resistance of more than 1.times.10.sup.7 ohms and has an extremely low programmed cell resistance of around 50 ohms.

Abstract: A method of fabricating a high-frequency bipolar transistor structure wherein the emitter, higher impurity concentration base, and lower impurity concentration base regions are defined in a single masking operation. Permeation etching is used to etch regions of an oxide layer under a layer of resist which defines regions of the higher impurity concentration thereby simultaneously defining the emitter and lower impurity concentration base regions. The higher impurity concentration base regions are formed by ion implantation of impurities through the unetched oxide regions. The resist is then removed and the lower impurity concentration base and emitters are formed through the resulting opening in the oxide. This results in the self-aligning of the emitter regions with respect to the base regions.

Abstract: A complementary insulated gate field effect transistor structure having complementary p-channel and n-channel devices in the same semiconductor substrate and a process for fabricating the structure incorporate oxide isolation of the active device regions, counterdoping of the p-well with impurities of opposite type to obtain a composite doping profile, reduction of Q.sub.ss in the isolation oxide, doping of the gate and field oxides with a chlorine species and phosphorus doping of the polycrystalline silicon gates.