Patents by Inventor Daniel Cummings
Daniel Cummings has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12613927Abstract: The present disclosure is related to framework for automatically and efficiently finding machine learning (ML) architectures that are optimized to one or more specified performance metrics and/or hardware platforms. This framework provides ML architectures that are applicable to specified ML domains and are optimized for specified hardware platforms in significantly less time than could be done manually and in less time than existing ML model searching techniques. Furthermore, a user interface is provided that allows a user to search for different ML architectures based on modified search parameters, such as different hardware platform aspects and/or performance metrics. Other embodiments may be described and/or claimed.Type: GrantFiled: December 23, 2024Date of Patent: April 28, 2026Assignee: Intel CorporationInventors: Anthony Sarah, Daniel Cummings, Juan Pablo Munoz, Tristan Webb
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Patent number: 12367249Abstract: The present disclosure is related to framework for automatically and efficiently finding machine learning (ML) architectures that are optimized to one or more specified performance metrics and/or hardware platforms. This framework provides ML architectures that are applicable to specified ML domains and are optimized for specified hardware platforms in significantly less time than could be done manually and in less time than existing ML model searching techniques. Furthermore, a user interface is provided that allows a user to search for different ML architectures based on modified search parameters, such as different hardware platform aspects and/or performance metrics. Other embodiments may be described and/or claimed.Type: GrantFiled: October 19, 2021Date of Patent: July 22, 2025Assignee: Intel CorporationInventors: Anthony Sarah, Daniel Cummings, Juan Pablo Munoz, Tristan Webb
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Patent number: 12324474Abstract: A protective garment assembly can include an elongate main portion having a length that extends between first and second ends. The main portion can include an upper fabric layer and a lower fabric layer. At least one energy-absorbing layer can be arranged between the upper and lower fabric layers and can extend at least partially between the first and second ends. At least one high-strength strip can be arranged between the upper and lower fabric layers adjacent to the at least one energy-absorbing layer. A plurality of armor elements can be arranged between the upper and lower fabric layers adjacent to the at least one energy-absorbing layer and the at least one high-strength strip.Type: GrantFiled: April 11, 2023Date of Patent: June 10, 2025Assignee: ZULU ALPHA KILO INC.Inventors: Vikramjeet Singh Bath, Daniel Cummings, Asa Alexander Couture Pinisch, Catalina Navarro, Lara Clair, Bartek Zalewski, Chris Pearen
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Publication number: 20250131048Abstract: The present disclosure is related to framework for automatically and efficiently finding machine learning (ML) architectures that are optimized to one or more specified performance metrics and/or hardware platforms. This framework provides ML architectures that are applicable to specified ML domains and are optimized for specified hardware platforms in significantly less time than could be done manually and in less time than existing ML model searching techniques. Furthermore, a user interface is provided that allows a user to search for different ML architectures based on modified search parameters, such as different hardware platform aspects and/or performance metrics. Other embodiments may be described and/or claimed.Type: ApplicationFiled: December 23, 2024Publication date: April 24, 2025Applicant: Intel CorporationInventors: Anthony Sarah, Daniel Cummings, Juan Pablo Munoz, Tristan Webb
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Patent number: 12130654Abstract: Described is apparatus comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may have an output coupled to a shared-read-data signal path, and the first circuitry either driving its output to a value based on a sensed memory bit, or not driving its output. The second circuitry may have a first clocked inverter and a second clocked inverter cross-coupled with the first clocked inverter, an input of the first clocked inverter being coupled to the shared-read-data signal path, and an output of the first clocked inverter being coupled to an inverse-data signal path. The third circuitry may have an inverter with an input coupled to the inverse-data signal path and an output coupled to a data signal path.Type: GrantFiled: December 30, 2022Date of Patent: October 29, 2024Assignee: Intel CorporationInventors: Amir Javidi, Daniel Cummings, Glenn Starnes
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Publication number: 20230320448Abstract: A protective garment assembly can include an elongate main portion having a length that extends between first and second ends. The main portion can include an upper fabric layer and a lower fabric layer. At least one energy-absorbing layer can be arranged between the upper and lower fabric layers and can extend at least partially between the first and second ends. At least one high-strength strip can be arranged between the upper and lower fabric layers adjacent to the at least one energy-absorbing layer. A plurality of armor elements can be arranged between the upper and lower fabric layers adjacent to the at least one energy-absorbing layer and the at least one high-strength strip.Type: ApplicationFiled: April 11, 2023Publication date: October 12, 2023Inventors: Vikramjeet Singh Bath, Daniel Cummings, Asa Alexander Couture Pinisch, Catalina Navarro, Lara Clair, Bartek Zalewski, Chris Pearen
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Publication number: 20230137508Abstract: Described is apparatus comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may have an output coupled to a shared-read-data signal path, and the first circuitry either driving its output to a value based on a sensed memory bit, or not driving its output. The second circuitry may have a first clocked inverter and a second clocked inverter cross-coupled with the first clocked inverter, an input of the first clocked inverter being coupled to the shared-read-data signal path, and an output of the first clocked inverter being coupled to an inverse-data signal path. The third circuitry may have an inverter with an input coupled to the inverse-data signal path and an output coupled to a data signal path.Type: ApplicationFiled: December 30, 2022Publication date: May 4, 2023Inventors: Amir JAVIDI, Daniel CUMMINGS, Glenn STARNES
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Patent number: 11619963Abstract: Described is apparatus comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may have an output coupled to a shared-read-data signal path, and the first circuitry either driving its output to a value based on a sensed memory bit, or not driving its output. The second circuitry may have a first clocked inverter and a second clocked inverter cross-coupled with the first clocked inverter, an input of the first clocked inverter being coupled to the shared-read-data signal path, and an output of the first clocked inverter being coupled to an inverse-data signal path. The third circuitry may have an inverter with an input coupled to the inverse-data signal path and an output coupled to a data signal path.Type: GrantFiled: June 3, 2021Date of Patent: April 4, 2023Assignee: Intel CorporationInventors: Amir Javidi, Daniel Cummings, Glenn Starnes
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Publication number: 20220391668Abstract: Methods, apparatus, systems, and articles of manufacture to iteratively search for an artificial intelligence-based architecture are disclosed. An example apparatus includes an interface to access a first subgroup of architecture configurations from a search space; instructions; and processor circuitry to execute the instructions to: train first predictors based on the first subgroup; generate a first plurality of candidate architecture configurations using the trained first predictors; and generate a second subgroup of architecture configurations by selecting a number of the plurality of candidate architecture configurations; train second predictors based on the first subgroup and the second subgroup; and generate a second plurality of candidate architecture configurations using the trained second predictors.Type: ApplicationFiled: June 21, 2022Publication date: December 8, 2022Inventors: Daniel Cummings, Maciej Szankin, Sharath Nittur Sridhar, Anthony Sarah
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Publication number: 20220335286Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for designing hardware.Type: ApplicationFiled: June 29, 2022Publication date: October 20, 2022Inventors: Daniel Cummings, Somdeb Majumdar, Anthony Sarah
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Publication number: 20220318595Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to improve neural architecture searches. An example apparatus includes similarity verification circuitry to identify candidate networks based on a combination of a target platform type, a target workload type to be executed by the target platform type, and historical benchmark metrics corresponding to the candidate networks, the candidate networks associated with performance metrics. The example apparatus also includes likelihood verification circuitry to categorize (a) a first set of the candidate networks based on a first one of the performance metrics corresponding to first tier values, and (b) a second set of the candidate networks based on a second one of the performance metrics corresponding to second tier values, and extract first features corresponding to the first set of the candidate networks and extract second features corresponding to the second set of the candidate networks.Type: ApplicationFiled: June 23, 2022Publication date: October 6, 2022Inventors: Sharath Nittur Sridhar, Daniel Cummings, Juan Pablo Munoz, Anthony Sarah
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Publication number: 20220035878Abstract: The present disclosure is related to framework for automatically and efficiently finding machine learning (ML) architectures that are optimized to one or more specified performance metrics and/or hardware platforms. This framework provides ML architectures that are applicable to specified ML domains and are optimized for specified hardware platforms in significantly less time than could be done manually and in less time than existing ML model searching techniques. Furthermore, a user interface is provided that allows a user to search for different ML architectures based on modified search parameters, such as different hardware platform aspects and/or performance metrics. Other embodiments may be described and/or claimed.Type: ApplicationFiled: October 19, 2021Publication date: February 3, 2022Inventors: Anthony Sarah, Daniel Cummings, Juan Pablo Munoz, Tristan Webb
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Patent number: 11203747Abstract: The present invention relates to methods for purifying or enriching a biomolecule using multimodal resins and an elution buffer containing a Good's buffer.Type: GrantFiled: December 23, 2019Date of Patent: December 21, 2021Assignee: Genzyme CorporationInventors: Rahul Godawat, Daniel Cummings, Veena Warikoo
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Publication number: 20210294374Abstract: Described is apparatus comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may have an output coupled to a shared-read-data signal path, and the first circuitry either driving its output to a value based on a sensed memory bit, or not driving its output. The second circuitry may have a first clocked inverter and a second clocked inverter cross-coupled with the first clocked inverter, an input of the first clocked inverter being coupled to the shared-read-data signal path, and an output of the first clocked inverter being coupled to an inverse-data signal path. The third circuitry may have an inverter with an input coupled to the inverse-data signal path and an output coupled to a data signal path.Type: ApplicationFiled: June 3, 2021Publication date: September 23, 2021Applicant: Intel CorporationInventors: Amir JAVIDI, Daniel CUMMINGS, Glenn STARNES
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Patent number: 11029720Abstract: Described is apparatus comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may have an output coupled to a shared-read-data signal path, and the first circuitry either driving its output to a value based on a sensed memory bit, or not driving its output. The second circuitry may have a first clocked inverter and a second clocked inverter cross-coupled with the first clocked inverter, an input of the first clocked inverter being coupled to the shared-read-data signal path, and an output of the first clocked inverter being coupled to an inverse-data signal path. The third circuitry may have an inverter with an input coupled to the inverse-data signal path and an output coupled to a data signal path.Type: GrantFiled: April 16, 2019Date of Patent: June 8, 2021Assignee: Intel CorporationInventors: Amir Javidi, Daniel Cummings, Glenn Starnes
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Publication number: 20200333825Abstract: Described is apparatus comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may have an output coupled to a shared-read-data signal path, and the first circuitry either driving its output to a value based on a sensed memory bit, or not driving its output. The second circuitry may have a first clocked inverter and a second clocked inverter cross-coupled with the first clocked inverter, an input of the first clocked inverter being coupled to the shared-read-data signal path, and an output of the first clocked inverter being coupled to an inverse-data signal path. The third circuitry may have an inverter with an input coupled to the inverse-data signal path and an output coupled to a data signal path.Type: ApplicationFiled: April 16, 2019Publication date: October 22, 2020Applicant: Intel CorporationInventors: Amir JAVIDI, Daniel CUMMINGS, Glenn STARNES
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Publication number: 20200131493Abstract: The present invention relates to methods for purifying or enriching a biomolecule using multimodal resins and an elution buffer containing a Good's buffer.Type: ApplicationFiled: December 23, 2019Publication date: April 30, 2020Applicant: Genzyme CorporationInventors: Rahul Godawat, Daniel Cummings, Veena Warikoo
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Publication number: 20150275195Abstract: The present invention relates to methods for purifying or enriching a biomolecule using multimodal resins and an elution buffer containing a Good's buffer.Type: ApplicationFiled: October 23, 2013Publication date: October 1, 2015Applicant: Genzyme CorporationInventors: Rahul Godawat, Daniel Cummings, Veena Warikoo
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Publication number: 20050280630Abstract: A computerized interactor system uses physical, three-dimensional objects as metaphors for input of user intent to a computer system. When one or more interactors are engaged with a detection field, the detection field reads an identifier associated with the object and communicates the identifier to a computer system. The computer system determines the meaning of the interactor based upon its identifier and upon a semantic context in which the computer system is operating.Type: ApplicationFiled: August 25, 2005Publication date: December 22, 2005Inventors: Emily Weil, Greg Thomas, S. Mountford, Thomas Dougherty, Daniel Cummings
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Publication number: 20050121346Abstract: Apparatus and methods for use with a transport device (e.g., a stretcher) include a closable outer container mountable to the transport device and a single use inner container configured to be retained within the outer container. The inner container defines an opening through which objects associated with a person may be inserted into the single use inner container. The single use inner container further includes a tamper evident closure for use in sealing the opening thereof.Type: ApplicationFiled: December 2, 2004Publication date: June 9, 2005Applicant: PHS West IncorporatedInventors: Daniel Cummings, Jacob Cummings, Beverly Ott