Patents by Inventor Daniel Cummings

Daniel Cummings has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12613927
    Abstract: The present disclosure is related to framework for automatically and efficiently finding machine learning (ML) architectures that are optimized to one or more specified performance metrics and/or hardware platforms. This framework provides ML architectures that are applicable to specified ML domains and are optimized for specified hardware platforms in significantly less time than could be done manually and in less time than existing ML model searching techniques. Furthermore, a user interface is provided that allows a user to search for different ML architectures based on modified search parameters, such as different hardware platform aspects and/or performance metrics. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: December 23, 2024
    Date of Patent: April 28, 2026
    Assignee: Intel Corporation
    Inventors: Anthony Sarah, Daniel Cummings, Juan Pablo Munoz, Tristan Webb
  • Patent number: 12367249
    Abstract: The present disclosure is related to framework for automatically and efficiently finding machine learning (ML) architectures that are optimized to one or more specified performance metrics and/or hardware platforms. This framework provides ML architectures that are applicable to specified ML domains and are optimized for specified hardware platforms in significantly less time than could be done manually and in less time than existing ML model searching techniques. Furthermore, a user interface is provided that allows a user to search for different ML architectures based on modified search parameters, such as different hardware platform aspects and/or performance metrics. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: July 22, 2025
    Assignee: Intel Corporation
    Inventors: Anthony Sarah, Daniel Cummings, Juan Pablo Munoz, Tristan Webb
  • Patent number: 12324474
    Abstract: A protective garment assembly can include an elongate main portion having a length that extends between first and second ends. The main portion can include an upper fabric layer and a lower fabric layer. At least one energy-absorbing layer can be arranged between the upper and lower fabric layers and can extend at least partially between the first and second ends. At least one high-strength strip can be arranged between the upper and lower fabric layers adjacent to the at least one energy-absorbing layer. A plurality of armor elements can be arranged between the upper and lower fabric layers adjacent to the at least one energy-absorbing layer and the at least one high-strength strip.
    Type: Grant
    Filed: April 11, 2023
    Date of Patent: June 10, 2025
    Assignee: ZULU ALPHA KILO INC.
    Inventors: Vikramjeet Singh Bath, Daniel Cummings, Asa Alexander Couture Pinisch, Catalina Navarro, Lara Clair, Bartek Zalewski, Chris Pearen
  • Publication number: 20250131048
    Abstract: The present disclosure is related to framework for automatically and efficiently finding machine learning (ML) architectures that are optimized to one or more specified performance metrics and/or hardware platforms. This framework provides ML architectures that are applicable to specified ML domains and are optimized for specified hardware platforms in significantly less time than could be done manually and in less time than existing ML model searching techniques. Furthermore, a user interface is provided that allows a user to search for different ML architectures based on modified search parameters, such as different hardware platform aspects and/or performance metrics. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: December 23, 2024
    Publication date: April 24, 2025
    Applicant: Intel Corporation
    Inventors: Anthony Sarah, Daniel Cummings, Juan Pablo Munoz, Tristan Webb
  • Patent number: 12130654
    Abstract: Described is apparatus comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may have an output coupled to a shared-read-data signal path, and the first circuitry either driving its output to a value based on a sensed memory bit, or not driving its output. The second circuitry may have a first clocked inverter and a second clocked inverter cross-coupled with the first clocked inverter, an input of the first clocked inverter being coupled to the shared-read-data signal path, and an output of the first clocked inverter being coupled to an inverse-data signal path. The third circuitry may have an inverter with an input coupled to the inverse-data signal path and an output coupled to a data signal path.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: October 29, 2024
    Assignee: Intel Corporation
    Inventors: Amir Javidi, Daniel Cummings, Glenn Starnes
  • Publication number: 20230320448
    Abstract: A protective garment assembly can include an elongate main portion having a length that extends between first and second ends. The main portion can include an upper fabric layer and a lower fabric layer. At least one energy-absorbing layer can be arranged between the upper and lower fabric layers and can extend at least partially between the first and second ends. At least one high-strength strip can be arranged between the upper and lower fabric layers adjacent to the at least one energy-absorbing layer. A plurality of armor elements can be arranged between the upper and lower fabric layers adjacent to the at least one energy-absorbing layer and the at least one high-strength strip.
    Type: Application
    Filed: April 11, 2023
    Publication date: October 12, 2023
    Inventors: Vikramjeet Singh Bath, Daniel Cummings, Asa Alexander Couture Pinisch, Catalina Navarro, Lara Clair, Bartek Zalewski, Chris Pearen
  • Publication number: 20230137508
    Abstract: Described is apparatus comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may have an output coupled to a shared-read-data signal path, and the first circuitry either driving its output to a value based on a sensed memory bit, or not driving its output. The second circuitry may have a first clocked inverter and a second clocked inverter cross-coupled with the first clocked inverter, an input of the first clocked inverter being coupled to the shared-read-data signal path, and an output of the first clocked inverter being coupled to an inverse-data signal path. The third circuitry may have an inverter with an input coupled to the inverse-data signal path and an output coupled to a data signal path.
    Type: Application
    Filed: December 30, 2022
    Publication date: May 4, 2023
    Inventors: Amir JAVIDI, Daniel CUMMINGS, Glenn STARNES
  • Patent number: 11619963
    Abstract: Described is apparatus comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may have an output coupled to a shared-read-data signal path, and the first circuitry either driving its output to a value based on a sensed memory bit, or not driving its output. The second circuitry may have a first clocked inverter and a second clocked inverter cross-coupled with the first clocked inverter, an input of the first clocked inverter being coupled to the shared-read-data signal path, and an output of the first clocked inverter being coupled to an inverse-data signal path. The third circuitry may have an inverter with an input coupled to the inverse-data signal path and an output coupled to a data signal path.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: April 4, 2023
    Assignee: Intel Corporation
    Inventors: Amir Javidi, Daniel Cummings, Glenn Starnes
  • Publication number: 20220391668
    Abstract: Methods, apparatus, systems, and articles of manufacture to iteratively search for an artificial intelligence-based architecture are disclosed. An example apparatus includes an interface to access a first subgroup of architecture configurations from a search space; instructions; and processor circuitry to execute the instructions to: train first predictors based on the first subgroup; generate a first plurality of candidate architecture configurations using the trained first predictors; and generate a second subgroup of architecture configurations by selecting a number of the plurality of candidate architecture configurations; train second predictors based on the first subgroup and the second subgroup; and generate a second plurality of candidate architecture configurations using the trained second predictors.
    Type: Application
    Filed: June 21, 2022
    Publication date: December 8, 2022
    Inventors: Daniel Cummings, Maciej Szankin, Sharath Nittur Sridhar, Anthony Sarah
  • Publication number: 20220335286
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for designing hardware.
    Type: Application
    Filed: June 29, 2022
    Publication date: October 20, 2022
    Inventors: Daniel Cummings, Somdeb Majumdar, Anthony Sarah
  • Publication number: 20220318595
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to improve neural architecture searches. An example apparatus includes similarity verification circuitry to identify candidate networks based on a combination of a target platform type, a target workload type to be executed by the target platform type, and historical benchmark metrics corresponding to the candidate networks, the candidate networks associated with performance metrics. The example apparatus also includes likelihood verification circuitry to categorize (a) a first set of the candidate networks based on a first one of the performance metrics corresponding to first tier values, and (b) a second set of the candidate networks based on a second one of the performance metrics corresponding to second tier values, and extract first features corresponding to the first set of the candidate networks and extract second features corresponding to the second set of the candidate networks.
    Type: Application
    Filed: June 23, 2022
    Publication date: October 6, 2022
    Inventors: Sharath Nittur Sridhar, Daniel Cummings, Juan Pablo Munoz, Anthony Sarah
  • Publication number: 20220035878
    Abstract: The present disclosure is related to framework for automatically and efficiently finding machine learning (ML) architectures that are optimized to one or more specified performance metrics and/or hardware platforms. This framework provides ML architectures that are applicable to specified ML domains and are optimized for specified hardware platforms in significantly less time than could be done manually and in less time than existing ML model searching techniques. Furthermore, a user interface is provided that allows a user to search for different ML architectures based on modified search parameters, such as different hardware platform aspects and/or performance metrics. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: October 19, 2021
    Publication date: February 3, 2022
    Inventors: Anthony Sarah, Daniel Cummings, Juan Pablo Munoz, Tristan Webb
  • Patent number: 11203747
    Abstract: The present invention relates to methods for purifying or enriching a biomolecule using multimodal resins and an elution buffer containing a Good's buffer.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: December 21, 2021
    Assignee: Genzyme Corporation
    Inventors: Rahul Godawat, Daniel Cummings, Veena Warikoo
  • Publication number: 20210294374
    Abstract: Described is apparatus comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may have an output coupled to a shared-read-data signal path, and the first circuitry either driving its output to a value based on a sensed memory bit, or not driving its output. The second circuitry may have a first clocked inverter and a second clocked inverter cross-coupled with the first clocked inverter, an input of the first clocked inverter being coupled to the shared-read-data signal path, and an output of the first clocked inverter being coupled to an inverse-data signal path. The third circuitry may have an inverter with an input coupled to the inverse-data signal path and an output coupled to a data signal path.
    Type: Application
    Filed: June 3, 2021
    Publication date: September 23, 2021
    Applicant: Intel Corporation
    Inventors: Amir JAVIDI, Daniel CUMMINGS, Glenn STARNES
  • Patent number: 11029720
    Abstract: Described is apparatus comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may have an output coupled to a shared-read-data signal path, and the first circuitry either driving its output to a value based on a sensed memory bit, or not driving its output. The second circuitry may have a first clocked inverter and a second clocked inverter cross-coupled with the first clocked inverter, an input of the first clocked inverter being coupled to the shared-read-data signal path, and an output of the first clocked inverter being coupled to an inverse-data signal path. The third circuitry may have an inverter with an input coupled to the inverse-data signal path and an output coupled to a data signal path.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: June 8, 2021
    Assignee: Intel Corporation
    Inventors: Amir Javidi, Daniel Cummings, Glenn Starnes
  • Publication number: 20200333825
    Abstract: Described is apparatus comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may have an output coupled to a shared-read-data signal path, and the first circuitry either driving its output to a value based on a sensed memory bit, or not driving its output. The second circuitry may have a first clocked inverter and a second clocked inverter cross-coupled with the first clocked inverter, an input of the first clocked inverter being coupled to the shared-read-data signal path, and an output of the first clocked inverter being coupled to an inverse-data signal path. The third circuitry may have an inverter with an input coupled to the inverse-data signal path and an output coupled to a data signal path.
    Type: Application
    Filed: April 16, 2019
    Publication date: October 22, 2020
    Applicant: Intel Corporation
    Inventors: Amir JAVIDI, Daniel CUMMINGS, Glenn STARNES
  • Publication number: 20200131493
    Abstract: The present invention relates to methods for purifying or enriching a biomolecule using multimodal resins and an elution buffer containing a Good's buffer.
    Type: Application
    Filed: December 23, 2019
    Publication date: April 30, 2020
    Applicant: Genzyme Corporation
    Inventors: Rahul Godawat, Daniel Cummings, Veena Warikoo
  • Publication number: 20150275195
    Abstract: The present invention relates to methods for purifying or enriching a biomolecule using multimodal resins and an elution buffer containing a Good's buffer.
    Type: Application
    Filed: October 23, 2013
    Publication date: October 1, 2015
    Applicant: Genzyme Corporation
    Inventors: Rahul Godawat, Daniel Cummings, Veena Warikoo
  • Publication number: 20050280630
    Abstract: A computerized interactor system uses physical, three-dimensional objects as metaphors for input of user intent to a computer system. When one or more interactors are engaged with a detection field, the detection field reads an identifier associated with the object and communicates the identifier to a computer system. The computer system determines the meaning of the interactor based upon its identifier and upon a semantic context in which the computer system is operating.
    Type: Application
    Filed: August 25, 2005
    Publication date: December 22, 2005
    Inventors: Emily Weil, Greg Thomas, S. Mountford, Thomas Dougherty, Daniel Cummings
  • Publication number: 20050121346
    Abstract: Apparatus and methods for use with a transport device (e.g., a stretcher) include a closable outer container mountable to the transport device and a single use inner container configured to be retained within the outer container. The inner container defines an opening through which objects associated with a person may be inserted into the single use inner container. The single use inner container further includes a tamper evident closure for use in sealing the opening thereof.
    Type: Application
    Filed: December 2, 2004
    Publication date: June 9, 2005
    Applicant: PHS West Incorporated
    Inventors: Daniel Cummings, Jacob Cummings, Beverly Ott