Patents by Inventor Daniel D. Moline

Daniel D. Moline has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8067834
    Abstract: In various embodiments, semiconductor components and methods to manufacture these components are disclosed. In one embodiment, a method to manufacture a semiconductor component is disclosed. The semiconductor includes a heat sink and a semiconductor die that has a first terminal on a top surface of the semiconductor die, a second terminal on the top surface of the die, and a third terminal on the bottom surface of the die. The method includes attaching a first portion of a leadframe structure to the first terminal of the semiconductor die. The method further includes attaching the second terminal of the semiconductor die to the heat sink after the attaching of the first portion of the leadframe structure to the first terminal of the semiconductor die, wherein the leadframe structure is spaced apart from the heat sink and is electrically isolated from the heat sink. Other embodiments are described and claimed.
    Type: Grant
    Filed: August 21, 2007
    Date of Patent: November 29, 2011
    Assignee: HVVi Semiconductors, Inc.
    Inventor: Daniel D. Moline
  • Publication number: 20090051018
    Abstract: In various embodiments, semiconductor components and methods to manufacture these components are disclosed. In one embodiment, a method to manufacture a semiconductor component is disclosed. The semiconductor includes a heat sink and a semiconductor die that has a first terminal on a top surface of the semiconductor die, a second terminal on the top surface of the die, and a third terminal on the bottom surface of the die. The method includes attaching a first portion of a leadframe structure to the first terminal of the semiconductor die. The method further includes attaching the second terminal of the semiconductor die to the heat sink after the attaching of the first portion of the leadframe structure to the first terminal of the semiconductor die, wherein the leadframe structure is spaced apart from the heat sink and is electrically isolated from the heat sink. Other embodiments are described and claimed.
    Type: Application
    Filed: August 21, 2007
    Publication date: February 26, 2009
    Applicant: HVVI SEMICONDUCTORS, INC.
    Inventor: Daniel D. Moline
  • Patent number: 5528202
    Abstract: A technique for achieving impedance transformations utilizing transmission lines has been provided. This technique involves placing additional distributed capacitance along the length of a transmission line thereby reducing the effective characteristic impedance of the transmission line. The effective wavelength for the transmission line is also reduced thereby substantially reducing the electrical length of a quarter wavelength matching network and making the transmission line practical and effective even at low frequencies.
    Type: Grant
    Filed: December 23, 1994
    Date of Patent: June 18, 1996
    Assignee: Motorola, Inc.
    Inventors: Daniel D. Moline, Robert P. Davidson
  • Patent number: 5309019
    Abstract: A low inductance lead frame (10) is formed to have a die attach area (11). A plurality of intermediate connection bars (12,13,14,15) are positioned to be parallel to sides of the die attach area (11), and to be in a plane that is displaced perpendicularly from the die attach area (11). Each end of each intermediate connection bar is separated from an end of each other intermediate connection bar. Supports (17) extend from the die attach area (11) to the intermediate connection bars (12,13,14,15) to provide support for the intermediate connection bars 12,13,14,15). A plurality of leads (19,33,34) are positional in a plane and have a proximal end near the intermediate connection bars (12,13,14,15).
    Type: Grant
    Filed: February 26, 1993
    Date of Patent: May 3, 1994
    Assignee: Motorola, Inc.
    Inventors: Daniel D. Moline, Bernard E. Weir, III
  • Patent number: 5075759
    Abstract: A surface mounting device incorporating a high power RF semiconductor transistor comprises a common lead plane, an input lead plane, a collector lead plane, a transistor die electrically and thermally connected to the collector lead plane, bonding wires for connecting emitters and bases of the transistor to the common and input lead planes respectively, and a molded plastic body member for sealing the device components while leaving the lower coplanar surfaces of the lead planes exposed on the bottom face of the device. There are no flying leads. By eliminating an expensive metallized ceramic insulator from inside the device package and instead providing electrical isolation as a part of an external circuit board, the cost for fabricating the device and installing them on the printed circuit board are significantly reduced. The device is particularly rugged and can be easily mounted on the PC board by automated equipment.
    Type: Grant
    Filed: September 24, 1990
    Date of Patent: December 24, 1991
    Assignee: Motorola, Inc.
    Inventor: Daniel D. Moline