Patents by Inventor Daniel Dzahini

Daniel Dzahini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9077370
    Abstract: Method and device for converting analog signals, of a plurality of pathways, into digital signals. A common circuit (2, 3) generates first analog signals corresponding to high-order bits of digital signals. For each pathway, a first means compares the first analog signals with the signal to be converted. A first means (18) stores high-order bits corresponding to the value of a first analog signal close to the signal to be converted. A means (9) stores the deviation between the analog signal to be converted and said first detected value. A generator means (11, 12) generates a predetermined number of second analog signals. A second means compares by successive approximations said second analog signals with said deviation. A means (20) stores said low-order bits corresponding to the results arising from said second means of comparison. A means (22) assembles said high-order bits and said low-order bits.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: July 7, 2015
    Assignee: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS)
    Inventors: Daniel Dzahini, Fatah-Ellah Rarbi, Laurent Gallin-Martel
  • Publication number: 20150022388
    Abstract: Method and device for converting analogue signals, of a plurality of pathways, into digital signals. A common circuit (2, 3) generates first analogue signals corresponding to high-order bits of digital signals For each pathway, a first means compares the first analogue signals with the signal to be converted. A first means (18) stores high-order bits corresponding to the value of a first analogue signal close to the signal to be converted. A means (9) stores the deviation between the analogue signal to be converted and said first detected value. A generator means (11, 12) generates a predetermined number of second analogue signals. A second means compares by successive approximations said second analogue signals with said deviation. A means (20) stores said low-order bits corresponding to the results arising from said second means of comparison. A means (22) assembles said high-order bits and said low-order bits.
    Type: Application
    Filed: February 26, 2013
    Publication date: January 22, 2015
    Inventors: Daniel Dzahini, Fatah-Ellah Rarbi, Laurent Gallin-Martel