Patents by Inventor Daniel E. Stasiw

Daniel E. Stasiw has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11837684
    Abstract: Submount structures for light-emitting diode (LED) packages are provided. Submounts may include a base material that is configured to provide high thermal conductivity and a ceramic layer on the base material that is configured to provide high reflectivity for one or more LED chips that are mounted thereon. In certain aspects, the base material may include a ceramic base having a ceramic material that is different than a material of the ceramic layer. In certain aspects, submounts may also include additional ceramic layers configured to provide high reflectivity. In certain aspects, LED packages include electrical traces that are arranged either on one or more ceramic layers or at least partially embedded within one or more ceramic layers. The arrangement of such ceramic layers may provide increased reflectivity in areas where it may be difficult for other reflective materials to be present, such as gaps formed between tightly spaced electrical traces.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: December 5, 2023
    Assignee: CreeLED, Inc.
    Inventors: David Suich, Daniel E. Stasiw, Samuel Richard Harrell, Jr.
  • Patent number: 11508715
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chip structures with electrical overstress protection are disclosed. LED chip structures are disclosed that include built-in electrical overstress protection. An exemplary LED chip may include an active LED structure that is arranged as a primary light-emitting structure and a separate active LED structure that is arranged as an electrical overstress protection structure. The electrical overstress protection structure may be electrically connected in reverse relative to the primary light-emitting structure. In this manner, under normal operating conditions, forward current will flow through the primary light-emitting structure to generate desired light emissions, and during an electrical overstress event, reverse current may flow through the electrical overstress protection structure, thereby protecting the light-emitting structure from damage.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: November 22, 2022
    Assignee: CreeLED, Inc.
    Inventors: Daniel E. Stasiw, Steven Wuester, Michael Check
  • Publication number: 20210336093
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chip structures with electrical overstress protection are disclosed. LED chip structures are disclosed that include built-in electrical overstress protection. An exemplary LED chip may include an active LED structure that is arranged as a primary light-emitting structure and a separate active LED structure that is arranged as an electrical overstress protection structure. The electrical overstress protection structure may be electrically connected in reverse relative to the primary light-emitting structure. In this manner, under normal operating conditions, forward current will flow through the primary light-emitting structure to generate desired light emissions, and during an electrical overstress event, reverse current may flow through the electrical overstress protection structure, thereby protecting the light-emitting structure from damage.
    Type: Application
    Filed: April 24, 2020
    Publication date: October 28, 2021
    Inventors: Daniel E. Stasiw, Steven Wuester, Michael Check
  • Publication number: 20210159368
    Abstract: Submount structures for light-emitting diode (LED) packages are provided. Submounts may include a base material that is configured to provide high thermal conductivity and a ceramic layer on the base material that is configured to provide high reflectivity for one or more LED chips that are mounted thereon. In certain aspects, the base material may include a ceramic base having a ceramic material that is different than a material of the ceramic layer. In certain aspects, submounts may also include additional ceramic layers configured to provide high reflectivity. In certain aspects, LED packages include electrical traces that are arranged either on one or more ceramic layers or at least partially embedded within one or more ceramic layers. The arrangement of such ceramic layers may provide increased reflectivity in areas where it may be difficult for other reflective materials to be present, such as gaps formed between tightly spaced electrical traces.
    Type: Application
    Filed: November 21, 2019
    Publication date: May 27, 2021
    Inventors: David Suich, Daniel E. Stasiw, Samuel Richard Harrell, JR.