Abstract: An enhanced quadrature receive serial interface circuit and methods are provided for calibrating the quadrature receive serial interface circuit. A quadrature receive serial interface circuit comprises a first phase rotator and a second phase rotator generating quadrature clocks of identical frequency. Calibration of the quadrature receive serial interface circuit uses a pseudo random bit sequence (PRBS) received by the quadrature receive serial interface circuit. For calibration, one-half of the received PRBS bits are sampled and the phase rotator generating in-phase 0° and 180° clock signals is adjusted to center the data eye for the sampled half of the PRBS bits. Then all data bits (even and odd data bits) of the received PRBS bits are sampled and the phase rotator generating quadrature phase 90° and 270° clock signals is adjusted to center the data eye of all data bits of the PRBS bits to complete calibration.

Abstract: Method and apparatus for transferring a data signal including receiving a digital data signal by a first input of a multiplexer of a transmitter operably coupled to a data link; transmitting, by a digital data signal output of the multiplexer, the digital data signal to a receiver that is operably coupled to the data link; receiving, by a selection signal input of the multiplexer, a first selection signal that indicates an idle mode for the transmitter; receiving, by a second input of the multiplexer, a patterned data signal; and transmitting, by the digital data signal output and in response to the first selection signal, the patterned data signal to the receiver.

Abstract: Method and apparatus for transferring a data signal including receiving a digital data signal by a first data input of a transmitter multiplexer; inverting the digital data signal by a first inverter, thereby providing an inverted digital data signal; receiving the inverted digital data signal by a first inverted data input of the transmitter multiplexer; counting, by a first counter, a clock signal; transmitting, by the first counter and in response to the first counter counting a threshold number of clock cycles, a first selection signal to a first selection signal input of the transmitter multiplexer; and alternately transmitting, in response to the first selection signal and by a first digital data signal output of the transmitter multiplexer, the digital data signal and the inverted digital data signal as the transmitter output signal to a receiver, the receiver and the digital data signal output operably coupled to a data link.

Abstract: An integrated circuit communication architecture is provided and includes a clock lane, a clock divider, and a first de-skew circuit. The clock lane is configured to send a clock signal at a first rate from a first chip to a second chip. The clock divider is on the second chip and is configured to receive the clock signal sent via the clock lane and to create and send a first divided clock signal and a second divided clock signal from the received clock signal. The divided clock signals are sent at reduced rates compared to the first rate. The clock divider maintains current mode logic properties for the divided clock signals. The first de-skew circuit is configured to receive and process the divided clock signals to allow for sampling of data transmitted from the first chip to the second chip.

Abstract: A method and system for facilitating collaboration between two groups without impairing or affecting the structure of the two groups is provided.

Abstract: A method and system for facilitating collaboration between two groups without impairing or affecting the structure of the two groups is provided.

Abstract: A method and system for facilitating collaboration between two groups without impairing or affecting the structure of the two groups is provided.

Abstract: A 3-dimensional (3D) video transmitter may be operable to encode a 3D video to generate a scalable video coding (SVC) base layer and a SVC enhancement layer. A first view such as a first high-resolution view and a second view such as a second high-resolution view of the 3D video in the SVC enhancement layer may be separate frames. A first half-resolution view and a second half-resolution view of the 3D video in the SVC base layer may be packed in a single frame. The first half-resolution view in the SVC base layer may be a base-layer reference for the first high-resolution view in the SVC enhancement layer for inter-layer prediction of spatial scalable coding. The first high-resolution view in the SVC enhancement layer may be an intra-layer reference for the second high-resolution view in the SVC enhancement layer for intra-layer prediction of temporal scalable coding.

Abstract: A 3-dimensional (3D) video transmitter may be operable to encode a 3D video to generate a scalable video coding (SVC) base layer and a SVC enhancement layer. A first view such as a first high-resolution view and a second view such as a second high-resolution view of the 3D video in the SVC enhancement layer may be separate frames. A first half-resolution view and a second half-resolution view of the 3D video in the SVC base layer may be packed in a single frame. The first half-resolution view in the SVC base layer may be a base-layer reference for the first high-resolution view in the SVC enhancement layer for inter-layer prediction of spatial scalable coding. The first high-resolution view in the SVC enhancement layer may be an intra-layer reference for the second high-resolution view in the SVC enhancement layer for intra-layer prediction of temporal scalable coding.

Abstract: A method and system for facilitating collaboration between two groups without impairing or affecting the structure of the two groups is provided.

Abstract: Presently described is a system and method for switching multimedia data communications, including but not limited to Voice over IP (VoIP) telephony, cable TV, digital audio and video. The system utilizes a single, integrated device to provide all PacketCable-compliant functionality, including enhanced user privacy, compliance with CALEA, E911 and other mandated services not available in conventional distributed PacketCable systems. High speed and efficient, low cost operation are provided by means of an optimized data unit encapsulation scheme for internal switching and routing. A proprietary fiber optic backplane and removable optical connectors are used to enable lightspeed internal communications hot-swapping of components. Furthermore, the present system is extensible to all forms of digital data switching and is secure, resistant to Denial of Service attacks, and fault-resilient.

Abstract: The present invention is directed to a reconfigurable data communications system. The system includes a removable optical backplane connector with a first end and a second end, a first data communications card, and a switch fabric card. The first data communications card includes an optical port configured to receive the first end of the removable optical backplane connector. The switch fabric card has a plurality of optical ports adapted to receive the second end of the removable optical backplane connector.

Abstract: The present invention relates to a processing solution supply cartridge which utilizes a single container for a single-part developer concentrate. The single container has at least two valves or necks and is adapted to be utilized on a existing processor or processing machine. The single developer container design of the present invention assures a complete emptying of the container by permitting the simultaneous replenishment of single-part developer through each of the valves into the processing machine. With the combination of the single developer container and the single-part developer the process of metering distinct developers through distinct containers is not required. By facilitating the complete emptying of the developer container, the likelihood of developer solution remaining in the container is minimized.

Abstract: The master/slave arbitration process includes a voting process that allows cards within the system to use voting to determine the health of each of the individual cards. The voting process thereby allows the system to determine whether a bad card is present and to make sure that a bad card has not been selected to be the master card for the system. By preventing a bad or malfunctioning card from being selected as the master, the systems and methods described herein guard against a system failure that may arise from appointing a malfunctioning card as the master card.

Abstract: Systems for in-band control that establish relationships between incoming data and one or more destinations to which the data is to be transmitted. In the in-band control embodiments described herein, a connection is established between two ends of a circuit by provisioning at one end of the circuit. A circuit connection table is kept at both ends of the circuit. This table contains the new and existing circuit connection information. A software process writes to the connection table at the local end of the circuit with the address information of the remote end of the circuit. The circuit connection information is to be periodically sent to the remote end to establish or tear down new connections.