Abstract: A reference current generator circuit for generating a reference current I.sub.R that is independent of variations in the base-to-emitter junction voltages V.sub.BE of the transistors in the generator circuit. Applying the reference current I.sub.R to a current source transistor Q.sub.CS in a CML circuit generates a collector current I.sub.O, output by the current source transistor Q.sub.CS, that is independent of the variations in the base-to-emitter junction voltages V.sub.BE of both circuits. This produces a CML output voltage V.sub.O that is nearly temperature independent. Combining the reference current generator circuit with a current source transistor provides a constant and stable current source that can be utilized in a variety of electronic circuit applications.

Abstract: A successive approximation analog-to-digital converter controllable by signals to start and interrupt conversion asynchronously with respect to clock signals used to regulate operation of the converter. Separate control signal processing circuits register the occurrence of start-convert and conversion-interrupt signals supplied by a user of the converter, and generate corresponding control signals synchronized with the clock signals. Asynchronous operation of the converter allows it to function in a short-cycling mode, wherein the number of bits of resolution in the conversion process is automatically reduced as little as possible to complete each conversion in the time allotted by the user. A continuous-conversion signal is also provided, to permit operation on a continuous basis, without providing periodic start-convert signals.

Abstract: A monolithic storage array (10) having multiple write ports (12, 14) and multiple read ports (16, 18), which may be used simultaneously in any combination. Each cell of the illustrative array has two storage flip-flops (Q1/Q4 and Q5/Q8), one for connection to each read port, and has a switching network (Q9-Q16) for connecting write-port row and column selection signals to set or reset both flip-flops as desired. Row selection for reading is effected by raising a power supply voltage coupled to the flip-flops, to increase noise immunity, and the device has only four isolated collectors, for high device density in monolithic form.

Abstract: A successive approximation analog-to-digital converter controllable by signals to start and interrupt conversion asynchronously with respect to clock signals used to regulate operation of the converter. Separate control signal processing circuits register the occurrence of start-convert and conversion-interrupt signals supplied by a user of the converter, and generate corresponding control signals synchronized with the clock signals. Asynchronous operation of the converter allows it to function in a short-cycling mode, wherein the number of bits of resolution in the conversion process is automatically reduced as little as possible to complete each conversion in the time allotted by the user. A continuous-conversion signal is also provided, to permit operation on a continuous basis, without providing periodic start-convert signals.