Abstract: The present application provides an integrated solar panel system. The integrated solar panel system may include a heat transfer plate, a solar photovoltaic subsystem positioned in part on the heat transfer plate, and a solar thermal subsystem positioned beneath the heat transfer plate. The solar thermal subsystem may include one or more internal concentrator plates positioned about the heat transfer plate.

Abstract: The present application provides a solar panel system. The solar panel system may include an aluminum outer frame, one or more photovoltaic panels positioned within the aluminum outer frame, and an adjustable support system connected to the aluminum outer frame such that the aluminum outer frame with the one or more photovoltaic panels includes a number of tilt angles.

Abstract: A method is provided for forming a thin film layer on a substrate. The method includes the steps of doping a thin surface layer on the substrate with low energy ions of a dopant material, and heating the thin surface layer sufficiently to produce a reaction between the dopant material and the surface layer. The heating step is performed simultaneously with at least part of the doping step. The doping step may utilize plasma doping of the thin surface layer. In one embodiment, the doping step includes plasma doping of a silicon oxide layer with nitrogen ions. The heating step may utilize thermal conduction or heating with radiation, such as heating with optical energy. The process may be used for forming dielectric layers having a thickness of 50 angstroms or less.

Abstract: Methods for forming ultrashallow junctions in semiconductor wafers include introducing into a shallow surface layer of a semiconductor wafer a dopant material that is selected to form charge carrier complexes which produce at least two charge carriers per complex, and short-time thermal processing of the doped surface layer to form the charge carrier complexes. The short-time thermal processing step may be implemented as flash rapid thermal processing of the doped surface layer, sub-melt laser processing of the doped surface layer, or RF or microwave annealing of the doped surface layer.

Abstract: A method and system to achieve shallow junctions using Electromagnetic Induction Heating (EMIH) that can be preceded or followed by a low-temperature Rapid Thermal Annealing (RTA) process. The methods and systems can use, for example, RF or microwave frequencies to induce electromagnetic fields that can induce currents to flow within the silicon wafer, thus causing ohmic collisions between electrons and the lattice structure that heat the wafer volumetrically rather than through the surface. Such EMIH heating can activate the dopant material. Defects in the silicon structure can be repaired by combining the EMIH annealing with a low-temperature (approximately 500–800 degrees Celsius) RTA that causes minimal diffusion, thus minimizing the difference between the as-implanted junction depth and the post-annealing junction depth when compared to annealing methods that only use traditional RTA.

Abstract: A method is provided for forming a thin film layer of a substrate. The method includes the steps of forming a thin surface layer containing a dopant material on the substrate, and short-time thermal processing of the doped surface layer with processing parameters selected to produce a reaction between the surface layer and the dopant material to form a dielectric film, a metal film or a silicide film. In one embodiment, short-time thermal processing is implemented by flash rapid thermal processing of the doped surface layer. In another embodiment, short-time thermal processing is implemented by sub-melt laser processing of the doped surface layer. The process may be used for forming dielectric layers having a thickness of 50 angstroms or less.

Abstract: Disclosed are methods and systems that include doping a semiconductor with at least one dopant, and exposing the semiconductor to an optical source(s), where the exposing occurs before, during, and/or after an annealing stage of said semiconductor. The annealing stage can include an annealing phase and/or an activation phase, which can occur substantially simultaneously. The systems can include at least one doping device for providing at least one dopant to a semiconductor, at least one annealing device to perform an annealing stage, and at least one optical source, where the semiconductor is exposed to light from the optical source(s) before, during, and/or after the annealing stage.

Abstract: Methods for forming ultrashallow junctions in semiconductor wafers include introducing into a shallow surface layer of a semiconductor wafer a dopant material that is selected to form charge carrier complexes which produce at least two charge carriers per complex, and short-time thermal processing of the doped surface layer to form the charge carrier complexes. The short-time thermal processing step may be implemented as flash rapid thermal processing of the doped surface layer, sub-melt laser processing of the doped surface layer, or RF or microwave annealing of the doped surface layer.

Abstract: A method is provided for forming a thin film layer of a substrate. The method includes the steps of forming a thin surface layer containing a dopant material on the substrate, and short-time thermal processing of the doped surface layer with processing parameters selected to produce a reaction between the surface layer and the dopant material to form a dielectric film, a metal film or a silicide film. In one embodiment, short-time thermal processing is implemented by flash rapid thermal processing of the doped surface layer. In another embodiment, short-time thermal processing is implemented by sub-melt laser processing of the doped surface layer. The process may be used for forming dielectric layers having a thickness of 50 angstroms or less.

Abstract: A method for forming a junction in a semiconductor by implanting a dopant and an ionic species in the semiconductor, and subjecting the semiconductor to athermal annealing. The athermal annealing, e.g., Electromagnetic Induction Heating (EMIH), can be performed using a microwave and/or RF frequency source. The dopant and the ionic species implantation can be performed simultaneously, the dopant implantation can precede the ionic species implantation, and the ionic species implantation can precede the dopant implantation. The implantation can occur using beam-line implantation or Plasma Doping (PLAD), and techniques such as preamorphized implantation (PAI) can optionally be used. A rapid thermal annealing (RTA) or low temperature rapid thermal annealing (LTRTA) process can also be applied to the semiconductor after implantation. The method can include controlling the oxygen content during the athermal (e.g., EMIH) annealing and/or other annealing (RTA and/or LTRTA) process.

Abstract: A method is provided for forming a thin film layer on a substrate. The method includes the steps of doping a thin surface layer on the substrate with low energy ions of a dopant material, and heating the thin surface layer sufficiently to produce a reaction between the dopant material and the surface layer. The heating step is performed simultaneously with at least part of the doping step. The doping step may utilize plasma doping of the thin surface layer. In one embodiment, the doping step includes plasma doping of a silicon oxide layer with nitrogen ions. The heating step may utilize thermal conduction or heating with radiation, such as heating with optical energy. The process may be used for forming dielectric layers having a thickness of 50 angstroms or less.

Abstract: A method and system to achieve shallow junctions using Electromagnetic Induction Heating (EMIH) that can be preceded or followed by a low-temperature Rapid Thermal Annealing (RTA) process. The methods and systems can use, for example, RF or microwave frequencies to induce electromagnetic fields that can induce currents to flow within the silicon wafer, thus causing ohmic collisions between electrons and the lattice structure that heat the wafer volumetrically rather than through the surface. Such EMIH heating can activate the dopant material. Defects in the silicon structure can be repaired by combining the EMIH annealing with a low-temperature (approximately 500-800 degrees Celsius) RTA that causes minimal diffusion, thus minimizing the difference between the as-implanted junction depth and the post-annealing junction depth when compared to annealing methods that only use traditional RTA.

Abstract: Methods and apparatus are provided for forming ultrashallow junctions in semiconductor wafers. The method includes the step of introducing into a shallow surface layer of a semiconductor wafer a dopant material that is selected to form charge carrier complexes, such as exciton complexes, which produce at least two charge carriers per complex. The semiconductor wafer containing the dopant material may be processed, such as by thermal processing, to form the charge carrier complexes. The charge carrier complexes are interstitial and therefore are not subject to the limitations imposed by the electrical solubility limits resulting from incorporation into substitutional sites. Thus, low sheet resistance can be obtained.

Abstract: A method is provided for forming a shallow junction in a semiconductor wafer that has been implanted with a dopant material. The dopant material is activated by thermal processing of the semiconductor wafer in a thermal processing chamber at a selected temperature for a selected time. The oxygen concentration in the thermal processing chamber during activation of the dopant material is controlled at or near a selected level less than a background level that is typically present when the thermal processing chamber is filled with a process gas. The oxygen concentration may be controlled at or near a selected level in a range less than 1000 parts per million and is preferably controlled at or near a selected level in a range of about 30-300 parts per million. The method is particularly useful for implanted boron or BF.sub.2 ions, but may be used for any dopant material.

Abstract: A method for forming a shallow junction in a semiconductor wafer includes the steps of implanting a dopant material, such as boron, into the wafer, selecting a fluorine dose and energy corresponding to the dopant material implant to produce a desired junction depth less than 1000 angstroms and a desired sheet resistance, and implanting fluorine into the semiconductor wafer at the selected dose and energy. The dopant material is activated by thermal processing of the semiconductor wafer at a selected temperature for a selected time to form the shallow junction. Residual fluorine and wafer damage may be removed by low temperature annealing following the step of activating the dopant material.

Abstract: In a method for reflow of a phosphosilicate glass (PSG) layer applied to a semiconductor wafer, the wafer is placed in a processing chamber in parallel alignment with a planar blackbody source. The chamber is evacuated, and the source rapidly and uniformly heats the PSG layer to a temperature at which plastic flow occurs. The blackbody source provides significant radiation in the 7-10 micron portion of the infrared spectrum. The thermal treatment is typically completed in 8-15 seconds, thereby avoiding impurity redistribution in the semiconductor device.

Abstract: A method for determining the end point for a physical etching process step measures the current at the target being etched and detects changes in the current. Changes in the current measured at the target are indicative of transitions between dissimilar materials or of depth of penetration in a particular material. Momentary changes in the etching flux of the physical etching process are factored out by measuring the current on a mask placed in the vicinity of the target and by subtracting mask current from current measured at the target.