Patents by Inventor Daniel F. Eichenberger

Daniel F. Eichenberger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9443615
    Abstract: Apparatuses and methods for memory testing with data compression is described. An example apparatus includes a plurality of latch test circuits, wherein each of the plurality of latch test circuits is coupled to a corresponding global data line of a memory. Each of the latch test circuits is configured to receive test data and is configured to latch data from the corresponding global data line or a corresponding mask bit. Each of the plurality of latch test circuits is further configured to output data based at least in part on the corresponding mask bit. A comparison circuit is coupled to an output of each of the latch test circuits and is configured to compare output data provided by each of the latch test circuits and provide a comparator output having a logical value indicative of whether all the output data matches.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: September 13, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Jason M. Johnson, Justin Wood, Gregory S. Hendrix, Mark D. Franklin, Daniel F. Eichenberger
  • Publication number: 20140157066
    Abstract: Apparatuses and methods for memory testing with data compression is described. An example apparatus includes a plurality of latch test circuits, wherein each of the plurality of latch test circuits is coupled to a corresponding global data line of a memory. Each of the latch test circuits is configured to receive test data and is configured to latch data from the corresponding global data line or a corresponding mask bit. Each of the plurality of latch test circuits is further configured to output data based at least in part on the corresponding mask bit. A comparison circuit is coupled to an output of each of the latch test circuits and is configured to compare output data provided by each of the latch test circuits and provide a comparator output having a logical value indicative of whether all the output data matches.
    Type: Application
    Filed: December 4, 2012
    Publication date: June 5, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Jason M. Johnson, Justin Wood, Gregory S. Hendrix, Mark D. Franklin, Daniel F. Eichenberger