Patents by Inventor Daniel Fan

Daniel Fan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10793247
    Abstract: An aircraft includes an enclosure positioned in a crown of the aircraft and extending in a direction parallel to a longitudinal axis of the aircraft. The crown is above a passenger cabin of the aircraft. The aircraft includes an equipment rack coupled to a first side of the enclosure. The equipment rack is configured to hold at least one electronic component. The aircraft further includes an entryway on a second side of the enclosure that is opposite to the first side. The entryway provides access to the enclosure from the passenger cabin.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: October 6, 2020
    Assignee: THE BOEING COMPANY
    Inventor: Daniel Fan
  • Publication number: 20190337603
    Abstract: An aircraft includes an enclosure positioned in a crown of the aircraft and extending in a direction parallel to a longitudinal axis of the aircraft. The crown is above a passenger cabin of the aircraft. The aircraft includes an equipment rack coupled to a first side of the enclosure. The equipment rack is configured to hold at least one electronic component. The aircraft further includes an entryway on a second side of the enclosure that is opposite to the first side. The entryway provides access to the enclosure from the passenger cabin.
    Type: Application
    Filed: May 1, 2018
    Publication date: November 7, 2019
    Inventor: Daniel Fan
  • Publication number: 20170271679
    Abstract: An improved method for manufacturing alkaline (e.g., zinc-manganese dioxide) electrochemical cells and a corresponding anode formulation are disclosed. In particular, zinc and a mixture of gelling agents are employed to better control the manufacturing conditions and to improve the overall performance of the resulting battery. The gelling agents are selected to have differences in resistivity, viscosity and polymerization/cross-linking. The zinc may be of any type, as is known in the art.
    Type: Application
    Filed: March 21, 2017
    Publication date: September 21, 2017
    Inventors: Daniel Fan, Walter Dinger, Robert Johnson, Weihong Li, Robert Heun
  • Publication number: 20100023294
    Abstract: An efficient automated testing system and method are presented. In one embodiment, an automated testing system includes a control component and an automated test instrument for testing a device or a plurality of devices (e.g., packages or wafers containing multiple independent different devices) under test. The automated test instrument component performs testing operation on the device or devices under test (DUT). The control component manages testing activities of a test instrument testing the device under test, including managing implementation of a plurality of test programs loaded as a group. In one exemplary implementation, the automated test system also includes a DUT interface and a user interface. The device under test interface interfaces with a device or devices under test.
    Type: Application
    Filed: August 28, 2008
    Publication date: January 28, 2010
    Applicant: CREDENCE SYSTEMS CORPORATION
    Inventors: Yung Daniel Fan, David N. Grant, Mark Hanbury Brown, Jonathan David Godfree Pryce
  • Patent number: 7143326
    Abstract: Testing an integrated circuit (IC) device, for example, an IC that includes an embedded memory, may involve specifying one or more test parameters including at least one of a pipeline depth data (e.g., latency delay information) and a data width data (e.g. corresponding to a data width of an embedded memory), generating a test sequence by associating test parameters with a test pattern, and applying the generated test sequence to the integrated circuit device. A test system for testing ICs having embedded memories may include multiple test patterns and multiple data structures, each data structure defining one or more test parameters including at least one of a pipeline depth and a data width, an algorithmic pattern generator, and software for controlling the algorithmic pattern generator to generate a test sequence by associating a specified data structure with a specified test pattern.
    Type: Grant
    Filed: March 19, 2002
    Date of Patent: November 28, 2006
    Assignee: Credence Systems Corporation
    Inventors: Daniel Fan, Kris Sakaitani, Burnell G. West
  • Publication number: 20020188902
    Abstract: Testing an integrated circuit (IC) device, for example, an IC that includes an embedded memory, may involve specifying one or more test parameters including at least one of a pipeline depth data (e.g., latency delay information) and a data width data (e.g. corresponding to a data width of an embedded memory), generating a test sequence by associating test parameters with a test pattern, and applying the generated test sequence to the integrated circuit device. A test system for testing ICs having embedded memories may include multiple test patterns and multiple data structures, each data structure defining one or more test parameters including at least one of a pipeline depth and a data width, an algorithmic pattern generator, and software for controlling the algorithmic pattern generator to generate a test sequence by associating a specified data structure with a specified test pattern.
    Type: Application
    Filed: March 19, 2002
    Publication date: December 12, 2002
    Inventors: Daniel Fan, Kris Sakaitani, Burnell G. West