Patents by Inventor Daniel Feezell

Daniel Feezell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Devices comprising distributed bragg reflectors and methods of making the devices
    Patent number: 12255265
    Abstract: A method for making a device. The method comprises forming a buffer layer on a substrate; forming a periodically doped layer on the buffer layer; forming one or more wires on the periodically doped layer, the wires being chosen from nanowires and microwires; and introducing porosity into the periodically doped layer to form a porous distributed Bragg reflector (DBR). Various devices that can be made by the method are also disclosed.
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: March 18, 2025
    Inventors: Tito Busani, Daniel Feezell, Mahmoud Behzadirad, Morteza Monavarian, Saadat Mishkat-Ul-Masabih
  • Rugged, single crystal wide-band-gap-material scanning-tunneling-microscopy/lithography tips
    Patent number: 12078654
    Abstract: Provided is a composite metal-wide-bandgap semiconductor tip for scanning tunneling microscopy and/or scanning tunneling lithography, a method of forming, and a method for using the composite metal-wide-bandgap semiconductor tip.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: September 3, 2024
    Inventors: Steven R. J. Brueck, Daniel Feezell, John Randall, Tito Busani, Joshua B. Ballard, Mahmoud Behzadirad, Ashwin Krishnan Rishinaramangalam
  • Removing or preventing dry etch-induced damage in Al/In/GaN films by photoelectrochemical etching
    Patent number: 11715635
    Abstract: A method comprises providing a substrate comprising an n-type Al/In/GaN semiconductor material. A surface of the substrate is dry-etched to form a trench therein and cause dry-etch damage to remain on the surface. The surface of the substrate is immersed in an electrolyte solution and illuminated with above bandgap light having a wavelength that generates electron-hole pairs in the n-type Al/In/GaN semiconductor material, thereby photoelectrochemically etching the surface to remove at least a portion of the dry-etch damage.
    Type: Grant
    Filed: November 12, 2021
    Date of Patent: August 1, 2023
    Inventors: Morteza Monavarian, Daniel Feezell, Andrew Aragon, Saadat Mishkat-Ul-Masabih, Andrew Allerman, Andrew Armstrong, Mary Crawford
  • Method of fabricating broad-band lattice-matched omnidirectional distributed Bragg reflectors using random nanoporous structures
    Patent number: 11652188
    Abstract: A method of forming and a random Distributed Bragg Reflector (DBR) is disclosed. The random DBR includes a substrate and a plurality of alternating layers of lattice-matched nanoporous GaN (NP-GaN) and GaN formed on a top surface of the substrate, wherein at least one of the alternating layers has a thickness of ?/4n and an adjacent one of the alternating layers does not have a thickness of ?/4n, wherein ? is a wavelength of incident radiation and n is the refractive index of a particular layer of the plurality of alternating layers.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: May 16, 2023
    Inventors: Morteza Monavarian, Daniel Feezell, Behnam Abaie, Arash Mafi, Saadat Mishkat-Ul-Masabih
  • Semiconductor product comprising a heteroepitaxial layer grown on a seed area of a nanostructured pedestal
    Patent number: 11456370
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: September 27, 2022
    Assignee: UNM RAINFOREST INNOVATIONS
    Inventors: Steven R. J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • METHOD OF MAKING HETEROEPITAXIAL STRUCTURES AND DEVICE FORMED BY THE METHOD
    Publication number: 20220293768
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Application
    Filed: May 31, 2022
    Publication date: September 15, 2022
    Inventors: Steven R.J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • METHOD OF MAKING HETEROEPITAXIAL STRUCTURES AND DEVICE FORMED BY THE METHOD
    Publication number: 20220285526
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Application
    Filed: May 24, 2022
    Publication date: September 8, 2022
    Inventors: Steven R.J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Method of making heteroepitaxial structures and device formed by the method
    Patent number: 11374106
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: June 28, 2022
    Inventors: Steven R. J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Method of making heteroepitaxial structures and device formed by the method
    Patent number: 11349011
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: May 31, 2022
    Inventors: Steven R. J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Method of forming a seed area and growing a heteroepitaxial layer on the seed area
    Patent number: 11342441
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: May 24, 2022
    Inventors: Steven R. J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Device with heteroepitaxial structure made using a growth mask
    Patent number: 11342438
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: May 24, 2022
    Inventors: Steven R. J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Semiconductor product comprising a heteroepitaxial layer grown on a seed area of a nanostructured pedestal
    Patent number: 11342442
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: May 24, 2022
    Inventors: Steven R. J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Method of making heteroepitaxial structures and device formed by the method
    Patent number: 11296208
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: April 5, 2022
    Inventors: Steven R. J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Device with heteroepitaxial structure made using a growth mask
    Patent number: 11296206
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: April 5, 2022
    Inventors: Steven R. J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Method of forming a seed area and growing a heteroepitaxial layer on the seed area
    Patent number: 11296207
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: April 5, 2022
    Inventors: Steven R. J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Removing or preventing dry etch-induced damage in Al/In/GaN films by photoelectrochemical etching
    Patent number: 11177126
    Abstract: A method comprises providing a substrate comprising an n-type Al/In/GaN semiconductor material. A surface of the substrate is dry-etched to form a trench therein and cause dry-etch damage to remain on the surface. The surface of the substrate is immersed in an electrolyte solution and illuminated with above bandgap light having a wavelength that generates electron-hole pairs in the n-type Al/In/GaN semiconductor material, thereby photoelectrochemically etching the surface to remove at least a portion of the dry-etch damage.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: November 16, 2021
    Inventors: Morteza Monavarian, Daniel Feezell, Andrew Aragon, Saadat Mishkat-Ul-Masabih, Andrew Allerman, Andrew Armstrong, Mary Crawford
  • Rugged, single crystal wide-band-gap-material scanning-tunneling-microscopy/lithography tips
    Patent number: 11002758
    Abstract: Provided is a composite metal-wide-bandgap semiconductor tip for scanning tunneling microscopy and/or scanning, tunneling lithography, a method of forming, and a method for using the composite metal-wide-bandgap semiconductor tip.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: May 11, 2021
    Inventors: Steven R. J. Brueck, Daniel Feezell, John Randall, Tito Busani, Joshua B. Ballard, Mahmoud Behzadirad, Ashwin Krishnan Rishinaramangalam
  • Atomic force microscopy based on nanowire tips for high aspect ratio nanoscale metrology/confocal microscopy
    Patent number: 10840092
    Abstract: Nanowires that may be utilized in microscopy, for example atomic force microscopy (AFM), as part of an AFM probe, as well as for other uses, are disclosed. The nanowires may be formed from a Group III nitride such as an epitaxial layer that may be or include gallium nitride, indium nitride, aluminum nitride, and an alloy of these materials. During use of the AFM probe to measure a topography of a test sample surface, the nanowire can activated and caused to lase and emit a light, thereby illuminating the surface with the light. In an implementation, the light can be collected by the AFM probe itself, for example through an optical fiber to which the nanowire is attached.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: November 17, 2020
    Inventors: Tito Busani, Steven R. J. Brueck, Daniel Feezell, Mahmoud Behzadirad
  • METHOD OF MAKING HETEROEPITAXIAL STRUCTURES AND DEVICE FORMED BY THE METHOD
    Publication number: 20200212198
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Application
    Filed: January 18, 2020
    Publication date: July 2, 2020
    Inventors: Steven R.J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • METHOD OF MAKING HETEROEPITAXIAL STRUCTURES AND DEVICE FORMED BY THE METHOD
    Publication number: 20200203505
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Application
    Filed: January 21, 2020
    Publication date: June 25, 2020
    Inventors: Steven R.J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell