Abstract: Techniques herein include a process chamber for depositing thin films to backside surfaces of wafers to reduce wafer bowing and distortion. A substrate support provides an annular perimeter seal around the bottom and/or side of the wafer which allows the majority of the substrate backside to be exposed to a process environment. A supported wafer separates the chamber into lower and upper chambers that provide different process environments. The lower section of the processing chamber includes deposition hardware configured to apply and remove thin films. The upper section can remain a chemically inert environment, protecting the existing features on the top surface of the wafer. Multiple exhausts and differential pressures are used to prevent deposition gasses from accessing the working surface of a wafer.

Abstract: Light can be used to monitor coating a liquid on a substrate. By directing the light to a spot on the substrate, when the liquid passes through the spot, some light will be reflected, while some light will be scattered. Monitoring this behavior can indicate whether a substrate has been successfully coated with the liquid, as well as identifying defects. Further, coating times can be monitored to make process adjustments.

Abstract: Light can be used to monitor coating a liquid on a substrate. By directing the light to a spot on the substrate, when the liquid passes through the spot, some light will be reflected, while some light will be scattered. Monitoring this behavior can indicate whether a substrate has been successfully coated with the liquid, as well as identifying defects. Further, coating times can be monitored to make process adjustments.

Abstract: Devices are made by self-aligned quad pitch patterning (SAQP) and methods for making devices by self-aligned quad pitch patterning (SAQP) use a single spacer in the process. An intermediate process step called self-aligned double patterning (SADP) is used to double the pitch following the spacer deposition. A pattern is formed on a substrate, the pattern having ultra-fine resolutions by repeating the SADP step twice for pitch quadrupling and introducing a reversal layer to form a fine trench pattern and hole pattern. An initial pattern is obtained by the X-Y double line exposures. Reverse material is applied on the initial pattern and subsequent etching process converts each initial trench pattern to a line. The pattern designs or pattern layouts have improved LER/LWR (line edge roughness and line width roughness respectively) for below 12 nm lines and trenches in order to create self-aligned cross pitch quad trenches.

Abstract: A method of forming a pattern on a substrate is provided. The method includes forming a first layer on an underlying layer of the substrate, where the first layer is patterned to have a first structure. The method also includes depositing a grafting material on side surfaces of the first structure, where the grafting material includes a solubility-shifting material. The method further includes diffusing the solubility-shifting material by a predetermined distance into a neighboring structure that abuts the solubility-shifting material, where the solubility-shifting material changes solubility of the neighboring structure in a developer, and removing soluble portions of the neighboring structure using the developer to form a second structure.

Abstract: Devices are made by self-aligned quad pitch patterning (SAQP), staircase patterning and double staircase patterning. Methods for making devices by self-aligned quad pitch patterning (SAQP) use a single spacer in the process. Methods for making devices by staircase patterning and double staircase patterning do not use a spacer. An intermediate process step called self-aligned double patterning (SADP) is used to double the pitch following the spacer deposition. A pattern is formed on a substrate, the pattern having ultra-fine resolutions by repeating the SADP step twice for pitch quadrupling and introducing a reversal layer to form a fine trench pattern and hole pattern. The pattern designs or pattern layouts have improved LER/LWR (line edge roughness and line width roughness respectively) for below 12 nm lines and trenches in order to create self-aligned cross pitch quad trenches.

Abstract: In certain embodiments, a method for processing a semiconductor substrate includes depositing a resin film on a substrate that has microfabricated structures defining recesses. The resin film fills the recesses and covers the microfabricated structures. The method includes performing, using a photoacid generator (PAG)-based process, a localized removal of the resin film to remove the resin film to respective first depths in the recesses, at least two depths of the respective first depths being different depths. The method includes repeatedly performing, using a thermal acid generator (TAG)-based process and until a predetermined condition is met, a uniform removal of a remaining portion of the resin film to remove a substantially uniform depth of the resin film in the recesses.

Abstract: A method of forming sub-resolution features that includes: exposing a photoresist layer formed over a substrate to a first ultraviolet light (UV) radiation having a first wavelength of 365 nm or longer through a mask configured to form features at a first critical dimension, the photoresist layer including first portions exposed to the first UV radiation and second portions unexposed to the first UV radiation after exposing with the first UV radiation; exposing the first portions and the second portions to a second UV radiation; and developing the photoresist layer after exposing the photoresist layer to the second UV radiation to form the sub-resolution features having a second critical dimension less than the first critical dimension.

Abstract: Techniques herein include methods for planarizing films including films used in the fabrication of semiconductor devices. Such fabrication can generate structures on a surface of a substrate, and these structures can have a spatially variable density across the surface. Planarization methods herein include depositing a first acid-labile film overtop the structures and the substrate, the first acid-labile film filling between the structures. A second acid-labile film is deposited overtop the first acid-labile film. An acid source film is deposited overtop the second acid-labile film, the acid source film including an acid generator configured to generate an acid in response to receiving radiation having a predetermined wavelength of light. A pattern of radiation is projected over the acid source film, the pattern of radiation having a spatially variable intensity at predetermined areas of the pattern of radiation.

Abstract: The disclosure relates to techniques and methods for planarizing a substrate by amplifying and controlling z-height technology. Variability of z-height can be modeled or measured for each device. A counter height pattern can then be created and processed on a substrate. By using different materials with different etch rates, a planarizing pattern can be transferred to the substrate or system to create a planarized substrate surface for improved lithography. Additionally, a transition region slope can be precisely controlled using the same methods.

Abstract: In certain embodiments, a method for processing a semiconductor substrate includes depositing a resin film on a substrate that has microfabricated structures defining recesses. The resin film fills the recesses and covers the microfabricated structures. The method includes performing, using a photoacid generator (PAG)-based process, a localized removal of the resin film to remove the resin film to respective first depths in the recesses, at least two depths of the respective first depths being different depths. The method includes repeatedly performing, using a thermal acid generator (TAG)-based process and until a predetermined condition is met, a uniform removal of a remaining portion of the resin film to remove a substantially uniform depth of the resin film in the recesses.

Abstract: Techniques herein include methods of forming conformal films on substrates including semiconductor wafers. Conventional film forming techniques can be slow and expensive. Methods herein include depositing a self-assembled monolayer (SAM) film over the substrate. The SAM film can include an acid generator configured to generate acid in response to a predetermined stimulus. A polymer film is deposited over the SAM film. The polymer film is soluble to a predetermined developer and configured to change solubility in response to exposure to the acid. The acid generator is stimulated and generates acid. The acid is diffused into the polymer film. The polymer film is developed with the predetermined developer to remove portions of the polymer film that are not protected from the predetermined developer. These process steps can be repeated a desired number of times to grow an aggregate film layer by layer.

Abstract: Devices are made by self-aligned quad pitch patterning (SAQP) and methods for making devices by self-aligned quad pitch patterning (SAQP) use a single spacer in the process. An intermediate process step called self-aligned double patterning (SADP) is used to double the pitch following the spacer deposition. A pattern is formed on a substrate, the pattern having ultra-fine resolutions by repeating the SADP step twice for pitch quadrupling and introducing a reversal layer to form a fine trench pattern and hole pattern. An initial pattern is obtained by the X-Y double line exposures. Reverse material is applied on the initial pattern and subsequent etching process converts each initial trench pattern to a line. The pattern designs or pattern layouts have improved LER/LWR (line edge roughness and line width roughness respectively) for below 12 nm lines and trenches in order to create self-aligned cross pitch quad trenches.

Abstract: Devices are made by self-aligned quad pitch patterning (SAQP), staircase patterning and double staircase patterning. Methods for making devices by self-aligned quad pitch patterning (SAQP) use a single spacer in the process. Methods for making devices by staircase patterning and double staircase patterning do not use a spacer. An intermediate process step called self-aligned double patterning (SADP) is used to double the pitch following the spacer deposition. A pattern is formed on a substrate, the pattern having ultra-fine resolutions by repeating the SADP step twice for pitch quadrupling and introducing a reversal layer to form a fine trench pattern and hole pattern. The pattern designs or pattern layouts have improved LER/LWR (line edge roughness and line width roughness respectively) for below 12 nm lines and trenches in order to create self-aligned cross pitch quad trenches.

Abstract: A method of microfabrication is provided. A substrate having a working surface and having a backside surface opposite to the working surface is received. The substrate has an initial wafer bow resulting from one or more micro fabrication processing steps executed on the working surface of the substrate. The initial wafer bow of the substrate is measured and the initial wafer bow is used to generate an initial wafer bow value that identifies a degree of first order wafer bowing of the substrate. A correction film recipe based on the initial wafer bow value is identified. The correction film recipe specifies parameters of a correction film to be deposited on the backside surface of the substrate to change wafer bow of the substrate from the initial wafer bow to a modified wafer bow. The correction film on the backside surface of the substrate according to the correction film recipe is deposited.

Abstract: Light can be used to monitor coating a liquid on a substrate. By directing the light to a spot on the substrate, when the liquid passes through the spot, some light will be reflected, while some light will be scattered. Monitoring this behavior can indicate whether a substrate has been successfully coated with the liquid, as well as identifying defects. Further, coating times can be monitored to make process adjustments.

Abstract: A method of planarizing a substrate includes receiving a substrate having structures formed on a target layer on a working surface of a substrate where the structures and the target layer are formed of different materials. Depositing a grafting material, including a solubility-shifting agent, on the substrate, the grafting material adhering to uncovered surfaces of the target layer without adhering to surfaces of the structures, depositing a fill material on the substrate that covers the grafting material, causing the solubility-shifting agent to diffuse a predetermined distance into the fill material, where the solubility-shifting agent causes the fill material to become insoluble to a predetermined solvent, and using the predetermined solvent to remove soluble portions of the fill material where the remaining portions of the fill material form a surface parallel to the working surface of the substrate.

Abstract: A method of forming a pattern on a substrate is provided. The method includes forming a first layer on an underlying layer of the substrate, where the first layer is patterned to have a first structure. The method also includes depositing a grafting material on side surfaces of the first structure, where the grafting material includes a solubility-shifting material. The method further includes diffusing the solubility-shifting material by a predetermined distance into a neighboring structure that abuts the solubility-shifting material, where the solubility-shifting material changes solubility of the neighboring structure in a developer, and removing soluble portions of the neighboring structure using the developer to form a second structure.

Abstract: Techniques herein include a method of patterning semiconductor wafers with improved line edge roughness (LER) and/or line width roughness (LWR), including lines below 12 nm in width. An initial bilayer mandrel is formed. The top layer is trimmed to a particular ratio. A reversal material protects uncovered portions of the lower layer, while a central portion is removed, resulting in two mandrels, each one fifth the initial mandrel width. The resulting mandrels are transferred into two underlying layers to form second bilayer mandrels. Sidewall spacers are formed on the second bilayer mandrels, and a fill material can fill remaining spaces. A planarization step can planarize the substrate to a bottom layer of the second bilayer mandrels, which results in a multi-line layer having square profile lines at 1:1 spacing ratio without spacer rounding.

Abstract: Techniques herein include a method of patterning semiconductor wafers with improved line edge roughness (LER) and/or line width roughness (LWR), including lines below 12 nm in width. An initial bilayer mandrel is formed. The top layer is trimmed to a particular ratio. A reversal material protects uncovered portions of the lower layer, while a central portion is removed, resulting in two mandrels, each one fifth the initial mandrel width. The resulting mandrels are transferred into two underlying layers to form second bilayer mandrels. Sidewall spacers are formed on the second bilayer mandrels, and a fill material can fill remaining spaces. A planarization step can planarize the substrate to a bottom layer of the second bilayer mandrels, which results in a multi-line layer having square profile lines at 1:1 spacing ratio without spacer rounding.