Patents by Inventor Daniel Fulford

Daniel Fulford has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260198256
    Abstract: A method of 3D imaging includes immersing an objective lens of a microscope at least partially in a liquid film formed on a wafer. The objective lens is spaced apart from the wafer. The microscope includes a light source configured to emit light of one or more wavelengths. A first image of a region within the wafer is captured using the one or more wavelengths. The wafer is reoriented relative to the region. The reorienting includes at least one of tilting the wafer or rotating the wafer. The reorienting is performed while keeping the objective lens at least partially immersed in the liquid film and spaced apart from the wafer. A second image of the region is captured using the one or more wavelengths.
    Type: Application
    Filed: January 6, 2025
    Publication date: July 9, 2026
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Daniel FULFORD, Anton DEVILLIERS, Mark I. GARDNER, H. Jim FULFORD
  • Publication number: 20260198268
    Abstract: A method of 3D imaging includes immersing an objective lens of a microscope at least partially in a liquid film formed on a wafer. The objective lens is spaced apart from the wafer. The microscope includes a light source configured to emit light of one or more wavelengths. A first image of a region within the wafer is captured using the one or more wavelengths. The wafer is moved toward or away from the objective lens while the objective lens is kept at least partially immersed in the liquid film and spaced apart from the wafer. A second image of the region is captured using the one or more wavelengths.
    Type: Application
    Filed: January 6, 2025
    Publication date: July 9, 2026
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Daniel FULFORD, Anton DEVILLIERS, Mark I. GARDNER, H. Jim FULFORD
  • Patent number: 12674765
    Abstract: Aspects of the present disclosure provide an apparatus. For example, the apparatus can include a wafer holder for holding a wafer, a light reflection device located beside a wafer edge and having a light reflection surface tilted with respect to a wafer surface, and a coherent light source for generating incident light to perform a scan on the wafer surface and the light reflection surface, which can reflect the incident light to generate reflection light, which can be detected by a light detector. The coherent light source, the light reflection device and the light detector can be arranged such that the incident light passes by the wafer edge and the reflection light generated by the light reflection surface is detected by the light detector or the reflection light generated by the light reflection surface passes by the wafer edge and is detected by the light detector.
    Type: Grant
    Filed: March 22, 2024
    Date of Patent: July 7, 2026
    Assignee: Tokyo Electron Limited
    Inventors: H. Jim Fulford, Daniel Fulford, Mark I. Gardner
  • Patent number: 12669321
    Abstract: An apparatus for measuring bow of a wafer, includes a substrate holder having a support surface configured to support a wafer; and a capacitor array unit including a plurality of electrodes laterally spaced from one another in the capacitor array unit. Each electrode faces the support surface and is spaced a respective fixed distance from the support surface such that each electrode can form a capacitor with an opposing area of a substrate provided on the support surface of the substrate holder.
    Type: Grant
    Filed: October 12, 2023
    Date of Patent: June 30, 2026
    Assignee: Tokyo Electron Limited
    Inventors: Daniel Fulford, Mark I. Gardner, Henry Jim Fulford, Anton Devilliers
  • Patent number: 12625432
    Abstract: A method of forming sub-resolution features that includes: exposing a photoresist layer formed over a substrate to a first ultraviolet light (UV) radiation having a first wavelength of 365 nm or longer through a mask configured to form features at a first critical dimension, the photoresist layer including first portions exposed to the first UV radiation and second portions unexposed to the first UV radiation after exposing with the first UV radiation; exposing the first portions and the second portions to a second UV radiation; and developing the photoresist layer after exposing the photoresist layer to the second UV radiation to form the sub-resolution features having a second critical dimension less than the first critical dimension.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: May 12, 2026
    Assignee: Tokyo Electron Limited
    Inventors: Daniel Fulford, Jodi Grzeskowiak, H. Jim Fulford, Sean Smith, Partha Mukhopadhyay, Michael Murphy, Anton deVilliers
  • Patent number: 12599922
    Abstract: Light can be used to monitor coating a liquid on a substrate. By directing the light to a spot on the substrate, when the liquid passes through the spot, some light will be reflected, while some light will be scattered. Monitoring this behavior can indicate whether a substrate has been successfully coated with the liquid, as well as identifying defects. Further, coating times can be monitored to make process adjustments.
    Type: Grant
    Filed: October 19, 2023
    Date of Patent: April 14, 2026
    Assignee: Tokyo Electron Limited
    Inventors: Mirko Vukovic, Daniel Fulford, Anton J. Devilliers
  • Publication number: 20260088690
    Abstract: A substrate processing apparatus includes a substrate holder configured to receive a substrate, a shaft connected to the substrate holder at one end of the shaft and configured to rotate the substrate holder, a plate attached to the shaft and configured to rotate with the shaft, magnets integrated with the substrate holder, the plate or both, and a coiled wire positioned between the substrate holder and the plate and configured to generate an electrical current when the shaft rotates. A method of energy generation includes providing the substrate processing apparatus and rotating the shaft to generate the electrical current.
    Type: Application
    Filed: September 23, 2024
    Publication date: March 26, 2026
    Applicant: Tokyo Electron Limited
    Inventors: Mark I. GARDNER, H. Jim FULFORD, Daniel FULFORD
  • Patent number: 12581898
    Abstract: An apparatus for measuring bow of a wafer includes a substrate holder including a support surface configured to support a wafer, and an air flow system including a plurality of air outlets in the support surface which are configured to output air for elevating the wafer above the substrate holder. A capacitor array unit including a plurality of electrodes laterally spaced from one another in the capacitor array unit, each electrode facing the support surface and being spaced a respective fixed distance from the support surface such that each electrode can form a capacitor with an opposing area of a wafer elevated by the substrate holder.
    Type: Grant
    Filed: November 16, 2023
    Date of Patent: March 17, 2026
    Assignee: Tokyo Electron Limited
    Inventors: Daniel Fulford, Mark I. Gardner, H. Jim Fulford
  • Publication number: 20260060040
    Abstract: A method of wafer handling includes providing a wafer on a wafer carrier on a wafer chuck on a vacuum plate. The wafer carrier includes a permanent magnet. The wafer chuck includes an electromagnet. The wafer is raised against a gravity direction by flowing an electrical current through the electromagnet so that the wafer carrier is repelled from the wafer chuck while the wafer remains on the wafer carrier. While keeping the wafer raised, wafer alignment is adjusted by moving the wafer chuck, the wafer carrier or both. The electrical current is reduced to zero so that the wafer carrier contacts the wafer chuck. The wafer is connected to the vacuum plate via a first vacuum cavity of the wafer chuck and a third vacuum cavity of the wafer carrier. The wafer carrier is connected to the vacuum plate via the second vacuum cavity of the wafer chuck.
    Type: Application
    Filed: August 22, 2024
    Publication date: February 26, 2026
    Applicant: Tokyo Electron Limited
    Inventors: Henry Jim FULFORD, Mark I. GARDNER, Daniel FULFORD
  • Patent number: 12435964
    Abstract: Systems and methods are provided herein for determining the planarity of a semiconductor wafer. The systems and methods described herein utilize a capacitive measurement tool to detect and characterize the bow of a semiconductor wafer. The capacitive measurement tool disclosed herein utilizes a non-contact, capacitive sensor unit to measure wafer bow. Unlike conventional capacitive sensing techniques used to measure wafer bow, the capacitive sensor unit disclosed herein uses a plurality of electrodes for simultaneously obtaining a plurality of capacitance measurements from the wafer at various locations on the wafer surface. By including a plurality of electrodes within the capacitive sensor unit, the techniques described herein increase the amount of data collected across the wafer surface at any given time to improve the throughput and measurement accuracy of the capacitive measurement tool.
    Type: Grant
    Filed: November 16, 2023
    Date of Patent: October 7, 2025
    Assignee: Tokyo Electron Limited
    Inventors: Daniel Fulford, Mark I. Gardner, Henry Jim Fulford
  • Publication number: 20250297969
    Abstract: Aspects of the present disclosure provide an apparatus. For example, the apparatus can include a wafer holder for holding a wafer, a light reflection device located beside a wafer edge and having a light reflection surface tilted with respect to a wafer surface, and a coherent light source for generating incident light to perform a scan on the wafer surface and the light reflection surface, which can reflect the incident light to generate reflection light, which can be detected by a light detector. The coherent light source, the light reflection device and the light detector can be arranged such that the incident light passes by the wafer edge and the reflection light generated by the light reflection surface is detected by the light detector or the reflection light generated by the light reflection surface passes by the wafer edge and is detected by the light detector.
    Type: Application
    Filed: March 22, 2024
    Publication date: September 25, 2025
    Applicant: Tokyo Electron Limited
    Inventors: H. Jim FULFORD, Daniel FULFORD, Mark I. GARDNER
  • Patent number: 12381118
    Abstract: Aspects of the present disclosure provide a bonding device for bonding two wafers. For example, the bonding device can include a first bonding chuck and a second bonding chuck. The first bonding chuck can have a first bonding head for a first wafer to be mounted thereon. The second bonding chuck can have a plurality of second bonding heads for a second wafer to be mounted thereon. The second bonding heads can be controlled individually to apply local pressures onto the second wafer to move the second wafer toward the first wafer to bond the second wafer to the first wafer, the local pressures corresponding to bow measurement of the first wafer and the second wafer.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: August 5, 2025
    Assignee: Tokyo Electron Limited
    Inventors: Andrew Weloth, Daniel Fulford, Anthony Schepis, Mark I. Gardner, H. Jim Fulford, Anton Devilliers, David Conklin
  • Patent number: 12341053
    Abstract: An apparatus for depositing films on a backside of a substrate includes a processing chamber and a substrate support having an annular support surface. A first gas distribution unit includes a plurality of gas delivery openings arranged along the backside surface of the substrate and configured to direct plasma deposition gas to the backside surface. A second gas distribution unit is configured to flow a second gas into the processing chamber such that the front side surface of the substrate is exposed to the second gas. A controller is configured to control flow of the plasma deposition gas from the first gas distribution unit, flow of the second gas from the second gas distribution unit a vacuum system. The controller maintains a gas pressure differential between the front side surface and the backside surface of the substrate sufficient to prevent passage of the deposition gas from the backside surface.
    Type: Grant
    Filed: February 19, 2024
    Date of Patent: June 24, 2025
    Assignee: Tokyo Electron Limited
    Inventors: Ronald Nasman, Gerrit J. Leusink, Rodney L. Robison, Hoyoung Kang, Daniel Fulford
  • Publication number: 20250189901
    Abstract: A method of processing a substrate, including generating a mask density map based on a photomask, the mask density map spatially mapping transparent regions of the photomask and blocking regions of the photomask that block radiation at a predetermined wavelength; generating a flare map based on the mask density map, the flare map spatially indicating a projected amount of received radiation in excess of a desired amount of radiation at each coordinate location on the photomask; and generating a critical dimension modification map based on the flare map, the critical dimension modification map including a modification energy dosage for each coordinate location on the photomask.
    Type: Application
    Filed: March 27, 2024
    Publication date: June 12, 2025
    Applicant: Tokyo Electron Limited
    Inventors: Daniel FULFORD, David POWER, David CONKLIN
  • Publication number: 20250164230
    Abstract: Systems and methods are provided herein for determining the planarity of a semiconductor wafer. The systems and methods described herein utilize a capacitive measurement tool to detect and characterize the bow of a semiconductor wafer. The capacitive measurement tool disclosed herein utilizes a non-contact, capacitive sensor unit to measure wafer bow. Unlike conventional capacitive sensing techniques used to measure wafer bow, the capacitive sensor unit disclosed herein uses a plurality of electrodes for simultaneously obtaining a plurality of capacitance measurements from the wafer at various locations on the wafer surface. By including a plurality of electrodes within the capacitive sensor unit, the techniques described herein increase the amount of data collected across the wafer surface at any given time to improve the throughput and measurement accuracy of the capacitive measurement tool.
    Type: Application
    Filed: November 16, 2023
    Publication date: May 22, 2025
    Inventors: Daniel Fulford, Mark I. Gardner, Henry Jim Fulford
  • Publication number: 20250167023
    Abstract: An apparatus for measuring bow of a wafer includes a substrate holder including a support surface configured to support a wafer, and an air flow system including a plurality of air outlets in the support surface which are configured to output air for elevating the wafer above the substrate holder. A capacitor array unit including a plurality of electrodes laterally spaced from one another in the capacitor array unit, each electrode facing the support surface and being spaced a respective fixed distance from the support surface such that each electrode can form a capacitor with an opposing area of a wafer elevated by the substrate holder.
    Type: Application
    Filed: November 16, 2023
    Publication date: May 22, 2025
    Applicant: Tokyo Electron Limited
    Inventors: Daniel FULFORD, Mark I. GARDNER, H. Jim FULFORD
  • Publication number: 20250167024
    Abstract: A wafer measurement stage for supporting a semiconductor wafer for surface geometry measurements. The wafer measurement stage includes a support body having a planar surface configured to face a wafer which is supported by the wafer measurement stage, and a wafer contact structure provided on the planar surface. The wafer contact structure is configured to contact a portion of a wafer such that the wafer is supported in an elevated position relative to the planar surface and to control gravity effects at non-contact portions of the wafer.
    Type: Application
    Filed: November 16, 2023
    Publication date: May 22, 2025
    Applicant: Tokyo Electron Limited
    Inventors: Daniel FULFORD, Mark I. GARDNER, H. Jim FULFORD
  • Publication number: 20250123090
    Abstract: An apparatus for measuring bow of a wafer, includes a substrate holder having a support surface configured to support a wafer; and a capacitor array unit including a plurality of electrodes laterally spaced from one another in the capacitor array unit. Each electrode faces the support surface and is spaced a respective fixed distance from the support surface such that each electrode can form a capacitor with an opposing area of a substrate provided on the support surface of the substrate holder.
    Type: Application
    Filed: October 12, 2023
    Publication date: April 17, 2025
    Applicant: Tokyo Electron Limited
    Inventors: Daniel FULFORD, Mark I. GARDNER, Henry Jim FULFORD, Anton DEVILLIERS
  • Patent number: 12276922
    Abstract: A method of microfabrication is provided. A substrate having a working surface and having a backside surface opposite to the working surface is received. The substrate has an initial wafer bow resulting from one or more micro fabrication processing steps executed on the working surface of the substrate. The initial wafer bow of the substrate is measured and the initial wafer bow is used to generate an initial wafer bow value that identifies a degree of first order wafer bowing of the substrate. A correction film recipe based on the initial wafer bow value is identified. The correction film recipe specifies parameters of a correction film to be deposited on the backside surface of the substrate to change wafer bow of the substrate from the initial wafer bow to a modified wafer bow. The correction film on the backside surface of the substrate according to the correction film recipe is deposited.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: April 15, 2025
    Assignee: Tokyo Electron Limited
    Inventors: Daniel Fulford, Anton J. Devilliers
  • Publication number: 20240203797
    Abstract: Aspects of the present disclosure provide a bonding device for bonding two wafers. For example, the bonding device can include a first bonding chuck and a second bonding chuck. The first bonding chuck can have a first bonding head for a first wafer to be mounted thereon. The second bonding chuck can have a plurality of second bonding heads for a second wafer to be mounted thereon. The second bonding heads can be controlled individually to apply local pressures onto the second wafer to move the second wafer toward the first wafer to bond the second wafer to the first wafer, the local pressures corresponding to bow measurement of the first wafer and the second wafer.
    Type: Application
    Filed: December 14, 2022
    Publication date: June 20, 2024
    Applicant: Tokyo Electron Limited
    Inventors: Andrew WELOTH, Daniel FULFORD, Anthony SCHEPIS, Mark I. GARDNER, H. Jim FULFORD, Anton DEVILLIERS, David CONKLIN