Patents by Inventor Daniel G. Borkowski

Daniel G. Borkowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10229883
    Abstract: In accordance with disclosed embodiments, there are provided systems, methods, and apparatuses for implementing late fusing of processor features using a non-volatile memory.
    Type: Grant
    Filed: October 1, 2016
    Date of Patent: March 12, 2019
    Assignee: Intel Corporation
    Inventors: Vasudevan Srinivasan, Daniel G. Borkowski
  • Patent number: 10009339
    Abstract: In one embodiment, a processor includes: a first die including at least one processor core to execute instructions and a non-volatile storage to store an identifier to be provisioned into the processor during manufacture; a second die to couple to the first die, the second die including a wireless circuit and a second non-volatile storage; and a wireless interface to couple to the second die to enable wireless communication with a wireless device. The processor may be disabled if the identifier is not stored in the second non-volatile storage. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: June 26, 2018
    Assignee: Intel Corporation
    Inventors: Sergiu D. Ghetie, Neeraj S. Upasani, Vijaya K. Boddu, Kenneth Young, Daniel G. Borkowski, Won Lee, Shahrokh Shahidzadeh, Samie B. Samaan
  • Publication number: 20180096177
    Abstract: In accordance with disclosed embodiments, there are provided systems, methods, and apparatuses for implementing late fusing of processor features using a non-volatile memory.
    Type: Application
    Filed: October 1, 2016
    Publication date: April 5, 2018
    Inventors: VASUDEVAN SRINIVASAN, DANIEL G. BORKOWSKI
  • Publication number: 20170289129
    Abstract: In one embodiment, a processor includes: a first die including at least one processor core to execute instructions and a non-volatile storage to store an identifier to be provisioned into the processor during manufacture; a second die to couple to the first die, the second die including a wireless circuit and a second non-volatile storage; and a wireless interface to couple to the second die to enable wireless communication with a wireless device. The processor may be disabled if the identifier is not stored in the second non-volatile storage. Other embodiments are described and claimed.
    Type: Application
    Filed: March 31, 2016
    Publication date: October 5, 2017
    Inventors: Sergiu D. Ghetie, Neeraj S. Upasani, Vijaya K. Boddu, Kenneth Young, Daniel G. Borkowski, Won Lee, Shahrokh Shahidzadeh, Samie B. Samaan
  • Patent number: 9720491
    Abstract: Systems and methods may provide for determining, in a first domain that manages a state of a second domain, that the second domain is in the state and determining, in the first domain, that a periodic action has been scheduled to occur in the second domain while the second domain is in the state. Additionally, the periodic action may be documented as a missed event with respect to the second domain. In one example, documenting the periodic action as a missed event includes incrementing a missed event counter.
    Type: Grant
    Filed: June 27, 2015
    Date of Patent: August 1, 2017
    Assignee: Intel Corporation
    Inventors: Dean Mulla, Daniel G. Borkowski, Krishnakanth V. Sistla, Victor Wu, Manev Luthra
  • Patent number: 9697059
    Abstract: A message channel optimization method and system enables multi-flow access to the message channel infrastructure within a CPU of a processor-based system. A user (pcode) employs a virtual channel to submit message channel transactions, with the message channel driver processing the transaction “behind the scenes”. The message channel driver thus allows the user to continue processing without having to block other transactions from being processed. Each transaction will be processed, either immediately or at some future time, by the message channel driver. The message channel optimization method and system are useful for tasks involving message channel transactions as well as non-message channel transactions.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: July 4, 2017
    Assignee: INTEL CORPORATION
    Inventors: Daniel G. Borkowski, Krishnakanth V. Sistla
  • Publication number: 20160378173
    Abstract: Systems and methods may provide for determining, in a first domain that manages a state of a second domain, that the second domain is in the state and determining, in the first domain, that a periodic action has been scheduled to occur in the second domain while the second domain is in the state. Additionally, the periodic action may be documented as a missed event with respect to the second domain. In one example, documenting the periodic action as a missed event includes incrementing a missed event counter.
    Type: Application
    Filed: June 27, 2015
    Publication date: December 29, 2016
    Applicant: INTEL CORPORATION
    Inventors: Dean Mulla, Daniel G. Borkowski, Krishnakanth V. Sistla, Victor Wu, Manev Luthra
  • Publication number: 20150254118
    Abstract: A message channel optimization method and system enables multi-flow access to the message channel infrastructure within a CPU of a processor-based system. A user (pcode) employs a virtual channel to submit message channel transactions, with the message channel driver processing the transaction “behind the scenes”. The message channel driver thus allows the user to continue processing without having to block other transactions from being processed. Each transaction will be processed, either immediately or at some future time, by the message channel driver. The message channel optimization method and system are useful for tasks involving message channel transactions as well as non-message channel transactions.
    Type: Application
    Filed: May 26, 2015
    Publication date: September 10, 2015
    Inventors: Daniel G. Borkowski, Krishnakanth V. Sistla
  • Patent number: 9092581
    Abstract: A message channel optimization method and system enables multi-flow access to the message channel infrastructure within a CPU of a processor-based system. A user (pcode) employs a virtual channel to submit message channel transactions, with the message channel driver processing the transaction “behind the scenes”. The message channel driver thus allows the user to continue processing without having to block other transactions from being processed. Each transaction will be processed, either immediately or at some future time, by the message channel driver. The message channel optimization method and system are useful for tasks involving message channel transactions as well as non-message channel transactions.
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: July 28, 2015
    Assignee: INTEL CORPORATION
    Inventors: Daniel G. Borkowski, Krishnakanth V. Sistla
  • Publication number: 20140101355
    Abstract: A message channel optimization method and system enables multi-flow access to the message channel infrastructure within a CPU of a processor-based system. A user (pcode) employs a virtual channel to submit message channel transactions, with the message channel driver processing the transaction “behind the scenes”. The message channel driver thus allows the user to continue processing without having to block other transactions from being processed. Each transaction will be processed, either immediately or at some future time, by the message channel driver. The message channel optimization method and system are useful for tasks involving message channel transactions as well as non-message channel transactions.
    Type: Application
    Filed: October 9, 2012
    Publication date: April 10, 2014
    Inventors: Daniel G. Borkowski, Krishnakanth V. Sistla
  • Patent number: 8363827
    Abstract: A generic multi-stage nested hash unit that provides support for generic, multi-stage nested hashes accelerates a wide range of security algorithms and protocols. The supported security algorithms and protocols include SSL v3 MAC, TLS PRF, and SSL v3 Key Material Generation. The hash unit allows the same code to be used to generate the MAC even when the MAC algorithms are different, for example, for SSL and TLS protocols.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: January 29, 2013
    Assignee: Intel Corporation
    Inventors: Kirk S. Yap, Stephanie L. Hirnak, Daniel G. Borkowski
  • Publication number: 20090141887
    Abstract: A generic multi-stage nested hash unit that provides support for generic, multi-stage nested hashes accelerates a wide range of security algorithms and protocols. The supported security algorithms and protocols include SSL v3 MAC, TLS PRF, and SSL v3 Key Material Generation. The hash unit allows the same code to be used to generate the MAC even when the MAC algorithms are different, for example, for SSL and TLS protocols.
    Type: Application
    Filed: December 3, 2007
    Publication date: June 4, 2009
    Inventors: Kirk S. Yap, Stephanie L. Hirnak, Daniel G. Borkowski
  • Patent number: 7391776
    Abstract: A method and apparatus to control interaction between two multi-threaded processor engines is presented. A first multi-threaded processor engine is configured for connection to a serial link, and performs receive and transmit operations in a first “PHY” mode of operation. A second multi-threaded processor engine is operable to process data received by the first multi-threaded processor over the serial link and to provide the processed data to the first multi-threaded processor engine for transmission over the serial link, when the first multi-threaded processor operates in the PHY mode. Additionally, the first multi-threaded processor engine is configured to execute certain operations, e.g., hardware accelerator operations, at the request of the second multi-threaded processor engine in a second “co-processor” mode of operation.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: June 24, 2008
    Assignee: Intel Corporation
    Inventors: Muthu Venkatachalam, Daniel G. Borkowski
  • Patent number: 7317737
    Abstract: Systems and methods are disclosed for using High-level Data Link Control (HDLC) channel context information to simultaneously process multiple HDLC channels. Preferred embodiments of the present invention enable a single network processing engine to process multiple HDLC channels. The current state of the HDLC channel can be evaluated, stored, and restored, which means that the processing of a channel can be halted, the channel state read and stored, and the state of a different channel written to the processing engine. This allows the engine to begin processing a new channel, and then, at a later stage, restore the state of the original channel and resume processing.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: January 8, 2008
    Assignee: Intel Corporation
    Inventors: Ronan D. O'Ceallaigh, Daniel G. Borkowski, Niall D. McDonnell
  • Patent number: 7301958
    Abstract: A method and apparatus for remapping channel data are presented. Multiple successive frames carrying data in timeslots are received. The timeslots are assigned to channels so that data for the channels includes interleaved data. The data from the multiple successive frames for each of a predetermined number of the timeslots are aggregated. The aggregated data is mapped, by timeslot, to produce a timeslot-based map. The aggregated data of the timeslot-based map is remapped to produce a channel-based map in which the data for the channels are grouped together by channel in the order that the data were received.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: November 27, 2007
    Assignee: Intel Corporation
    Inventors: Daniel G. Borkowski, Nancy S. Borkowski
  • Patent number: 5787347
    Abstract: Methods and apparatus for selecting a system for communication with a personal station, such as a cellular telephone or a PCS station, in a roaming area. The personal station transmits a system access message to a default system. When the default system that receives the system access message is a visited system in the roaming area and the personal station is not registered with the visited system, the visited system registers the presence of the personal station in the roaming area with a home system for the personal station. The home system sends a response including a selection indication to the personal station through the visited system. The selection indication contains selection information for controlling selection of a system for communication with the personal station in the roaming area. The personal station selects a system for communication in the roaming area in accordance with the selection information.
    Type: Grant
    Filed: December 11, 1995
    Date of Patent: July 28, 1998
    Assignee: GTE Laboratories Incorporated
    Inventors: I-Hsiang Yu, Daniel G. Borkowski, Kenneth Chao
  • Patent number: 5519760
    Abstract: In a cellular system configuration, the location of a mobile station is determined from the acquisition of cellular network data pertaining to the mobile station, and the translation of such network data into a corresponding geographical position profile. The cellular system includes a mobile station locator entity for receiving from a mobile switching center the network data such as cell and/or sector ID and trunk group member number. The mobile station locator translates the network data into position information such as geographic coordinates (latitude and longitude), resolution (radius), and angle values for sectorized cells.
    Type: Grant
    Filed: June 22, 1994
    Date of Patent: May 21, 1996
    Assignee: GTE Laboratories Incorporated
    Inventors: Daniel G. Borkowski, Hingsum F. Fung, Hadi F. Habal, Kenneth Chao, Sheng-roan Kai, Robert D. Packard, II
  • Patent number: 5220593
    Abstract: A system (10) for operating a multiplicity of credit card reader-equipped cellular mobile radiotelephones (CMRs 12) as credit card paystations is disclosed. The CMRs (12) incorporate a remotely programmable unit (RPU 48) which controls credit card operation (1400, 1700) and which controls data communication sessions (1800, 1900, 2100) with a credit card (CC) host (26) and a remote programming (RP) host (24). The RPU (48) resides between a conventional control unit (CU 42) and a conventional transmit/receive unit (TRU 62) of a conventional CMR. The RPU (48) monitors messages (1200, 1300) transmitted from the CU (42) and from the TRU (62). The CMR (12) powers up in a locked state (1402), within which a credit card (88) may be read. The credit card is locally validated (1421) at CMR 12. If the validation is successful, the CMR (12) is unlocked so that a call may be placed.
    Type: Grant
    Filed: March 31, 1992
    Date of Patent: June 15, 1993
    Assignee: GTE Mobile Communications Service Corporation
    Inventors: Robert G. Zicker, Thanh H. Cao, Daniel G. Borkowski, Donald A. Plouff, Phillip D. Brown, Jr.
  • Patent number: 5144649
    Abstract: A system (10) for operating a multiplicity of credit card reader-equipped cellular mobile radiotelephones (CMRs 12) as credit card paystations is disclosed. The CMRs (12) incorporate a remotely programmable unit (RPU 48) which controls credit card operation (1400, 1700) and which controls data communication sessions (188, 1900, 2100) with a credit card (CC) host (26) and a remote programming (RP) host (24). The RPU (48) resides between a conventional control unit (CU 42) and a conventional transmit/receive unit (TRU 62) of a conventional CMR. The RPU (48) monitors messages (1200, 1300) transmitted from the CU (42) and from the TRU (62). The CMR (12) powers up in a locked state (1402), within which a credit card (88) may be read. The credit card is locally validated (1421) at CMR 12. If the validation is successful, the CMR (12) is unlocked so that a call may be placed.
    Type: Grant
    Filed: October 24, 1990
    Date of Patent: September 1, 1992
    Assignee: GTE Mobile Communications Service Corporation
    Inventors: Robert G. Zicker, Thanh H. Cao, Daniel G. Borkowski, Donald A. Plouff, Phillip D. Brown, Jr.
  • Patent number: RE38267
    Abstract: In a cellular system configuration, the location of a mobile station is determined from the acquisition of cellular network data pertaining to the mobile station, and the translation of such network data into a corresponding geographical position profile. The cellular system includes a mobile station locator entity for receiving from a mobile switching center the network data such as cell and/or sector ID and trunk group member number. The mobile station locator translates the network data into position information such as geographic coordinates (latitude and longitude), resolution (radius), and angle values for sectorized cells.
    Type: Grant
    Filed: May 18, 1998
    Date of Patent: October 7, 2003
    Assignee: Verizon Laboratories, Inc.
    Inventors: Daniel G. Borkowski, Hingsum F. Fung, Hadi F. Habal, Kenneth Chao, Sheng-Roan Kai, Robert D. Packard, II, Manuel Maseda