Patents by Inventor Daniel Greenspan

Daniel Greenspan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9436623
    Abstract: Methods, apparatus and systems for implementing run-time fabric reconfiguration are described herein. In accordance with one aspect, techniques are disclosed for implementing run-time fabric reconfiguration on a System on a Chip (SoC) via use of multiple endpoint fabric interfaces having routing logic that is dynamically reconfigured at run-time by a fabric control unit in response to system-state changes. The endpoint fabric interfaces may be coupled to or integrated in IP blocks that are coupled to a switch fabric, or may be implemented in the switch fabric itself. The run-time fabric reconfiguration techniques may be implemented to for various purposes and/or to address various events, such as node failures, security events, IP or design bugs, feature prototyping, and virtualization.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: September 6, 2016
    Assignee: Intel Corporation
    Inventors: Aviad Wertheimer, Daniel Greenspan
  • Publication number: 20160246734
    Abstract: Systems and methods for improving write-back cache performance by utilizing scrubbed state indicators associated with the cache entries. The example system may comprise: a cache comprising a plurality of cache entries; a processing core, coupled to the cache; and a cache controller configured to maintain a plurality of indicators corresponding to a plurality of cache entries, wherein each indicator of the plurality of indicators indicates whether a corresponding cache entry has been scrubbed by synchronizing the cache entry with a next level memory after the cache entry has been modified.
    Type: Application
    Filed: February 25, 2015
    Publication date: August 25, 2016
    Inventors: Daniel Greenspan, Yoav Lossin
  • Patent number: 9396120
    Abstract: Disclosed is a cache locking system that includes a cache controller that is operable to receive a first request from a device to lock a first way in the cache. The cache controller is operable to determine that the first way in the cache is not lockable by the device. The cache controller is also operable to send, to the device, a rejection of the first request. The cache controller is further operable to receive a second request from the device to lock a second way in the cache. The cache controller is operable to lock the second way in the cache in response to the second request.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: July 19, 2016
    Assignee: INTEL CORPORATION
    Inventors: Daniel Greenspan, Supratik Majumder
  • Publication number: 20160179666
    Abstract: In an embodiment, a processor includes at least one core, a cache memory, and a cache controller. Responsive to a request to store an address of a data entry into the cache memory, the cache controller is to determine whether an initial cache set of the cache memory and corresponding to the address has available capacity to store the address. Responsive to unavailability of capacity in the initial cache set, the cache controller is to generate a first alternate address associated with the data entry and to determine whether a first cache set corresponding to the first alternate address has available capacity to store the alternate address and if so to store the first alternate address in the first cache set. Other embodiments are described and claimed.
    Type: Application
    Filed: December 17, 2014
    Publication date: June 23, 2016
    Inventors: Daniel Greenspan, Yoav Lossin, Blaise Fanning, Nagi Aboulenein, Marc Torrant
  • Publication number: 20160179681
    Abstract: Disclosed is a cache locking system that includes a cache controller that is operable to receive a first request from a device to lock a first way in the cache. The cache controller is operable to determine that the first way in the cache is not lockable by the device. The cache controller is also operable to send, to the device, a rejection of the first request. The cache controller is further operable to receive a second request from the device to lock a second way in the cache. The cache controller is operable to lock the second way in the cache in response to the second request.
    Type: Application
    Filed: December 23, 2014
    Publication date: June 23, 2016
    Inventors: Daniel Greenspan, Supratik Majumder
  • Patent number: 8817937
    Abstract: A timing control apparatus includes an adder and a comparator. The adder adds unused time error in each of a plurality of periods to form a cumulative value, and the comparator compares the cumulative value to a reference value. The unused time error is computed during operation of a first clock, and a control signal is generated to switch from the first clock to a second clock based on an output of the comparator. The frequency of the first clock is greater than a frequency of the second clock.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: August 26, 2014
    Assignee: Intel Corporation
    Inventor: Daniel Greenspan
  • Publication number: 20140140459
    Abstract: A timing control apparatus includes an adder and a comparator. The adder adds unused time error in each of a plurality of periods to form a cumulative value, and the comparator compares the cumulative value to a reference value. The unused time error is computed during operation of a first clock, and a control signal is generated to switch from the first clock to a second clock based on an output of the comparator. The frequency of the first clock is greater than a frequency of the second clock.
    Type: Application
    Filed: November 21, 2012
    Publication date: May 22, 2014
    Inventor: Daniel GREENSPAN
  • Publication number: 20140082237
    Abstract: Methods, apparatus and systems for implementing run-time fabric reconfiguration are described herein. In accordance with one aspect, techniques are disclosed for implementing run-time fabric reconfiguration on a System on a Chip (SoC) via use of multiple endpoint fabric interfaces having routing logic that is dynamically reconfigured at run-time by a fabric control unit in response to system-state changes. The endpoint fabric interfaces may be coupled to or integrated in IP blocks that are coupled to a switch fabric, or may be implemented in the switch fabric itself. The run-time fabric reconfiguration techniques may be implemented to for various purposes and/or to address various events, such as node failures, security events, IP or design bugs, feature prototyping, and virtualization.
    Type: Application
    Filed: September 20, 2012
    Publication date: March 20, 2014
    Inventors: Aviad Wertheimer, Daniel Greenspan
  • Patent number: 7680413
    Abstract: An optical network monitoring system and method provide for optical network diverting or further legal intercept, operational and/or other monitoring of general or specific transmission information that may be transmitted via a network optical branch. In one embodiment, a splitter within a diverter assembly diverts a portion of a received transmission signal (strength) to an optical receiver or re-transmitter, and outputs a further portion of the signal via a diverter assembly output or further via a re-transmitter or booster. In another embodiment, the splitter is generally matched to the receiver. A further embodiment provides for transferring the diverted portion to a monitoring assembly with which the diverting assembly may be matched, disposed or otherwise integrated, and which may provide for configuring the diverting assembly.
    Type: Grant
    Filed: May 26, 2005
    Date of Patent: March 16, 2010
    Assignee: Cisco Technology, Inc.
    Inventor: Daniel Greenspan
  • Publication number: 20080085863
    Abstract: ?2-macroglobulin-related agents for treating or preventing a fibrotic disorder associated with fibrillogenesis are disclosed along with methods for using the agents, as well as methods for producing agents suited for use in the disclosed methods for treating or preventing a fibrotic disorder.
    Type: Application
    Filed: August 21, 2007
    Publication date: April 10, 2008
    Inventors: Daniel Greenspan, Yue Zhang, Gaoxiang Ge
  • Publication number: 20060275280
    Abstract: It has been determined that metalloprotease cleavage of a myostatin pro peptide results in activation of a latent inactive myostatin to an active form. Accordingly, methods of identifying agents that modulate metalloprotease mediated activation of myostatin are provided, as are agents identified using such methods. Also provided are methods of modulating muscle growth in an organism by increasing or decreasing metalloprotease mediated cleavage of a myostatin pro peptide.
    Type: Application
    Filed: August 2, 2006
    Publication date: December 7, 2006
    Inventors: Se-Jin Lee, Alexandra McPherron, Daniel Greenspan, William Pappano, Neil Wolfman, Kathy Tomkinson
  • Publication number: 20060269290
    Abstract: An optical network monitoring system and method provide for optical network diverting or further legal intercept, operational and/or other monitoring of general or specific transmission information that may be transmitted via a network optical branch. In one embodiment, a splitter within a diverter assembly diverts a portion of a received transmission signal (strength) to an optical receiver or re-transmitter, and outputs a further portion of the signal via a diverter assembly output or further via a re-transmitter or booster. In another embodiment, the splitter is generally matched to the receiver. A further embodiment provides for transferring the diverted portion to a monitoring assembly with which the diverting assembly may be matched, disposed or otherwise integrated, and which may provide for configuring the diverting assembly.
    Type: Application
    Filed: May 26, 2005
    Publication date: November 30, 2006
    Applicant: Cisco Technology, Inc.
    Inventor: Daniel Greenspan
  • Publication number: 20050043232
    Abstract: It has been determined that metalloprotease cleavage of a myostatin pro peptide results in activation of a latent inactive myostatin to an active form. Accordingly, methods of identifying agents that modulate metalloprotease mediated activation of myostatin are provided, as are agents identified using such methods. Also provided are methods of modulating muscle growth in an organism by increasing or decreasing metalloprotease mediated cleavage of a myostatin pro peptide.
    Type: Application
    Filed: September 16, 2003
    Publication date: February 24, 2005
    Inventors: Se-Jin Lee, Alexandra McPherron, Daniel Greenspan, William Pappano, Neil Wolfman, Kathy Tomkinson