Patents by Inventor Daniel H. Leemann

Daniel H. Leemann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6295619
    Abstract: A method for storing data in a memory partitions the memory into a plurality of partitions. A primary logical identifier is stored in the memory to identify each partition of data. A secondary identifier number is also stored in the memory to identify each partition of data, the secondary logical identifier redundant to the primary logical identifier. A primary logical identifier is used to locate at least one partition of data stored in the memory after receiving a requested partition number identifying a requested partition. The secondary logical identifier is used to compute a value to further identify the at least one partition of data. The value is computed by performing a logical AND operation between the primary logical identifier and the secondary logical identifier. This value is compared with the requested partition number. A method of detecting column short bit locations in a memory arranged as m words of n bits of memory.
    Type: Grant
    Filed: November 24, 1998
    Date of Patent: September 25, 2001
    Assignee: Intel Corporation
    Inventors: Robert N. Hasbun, Daniel H. Leemann
  • Patent number: 5875477
    Abstract: A method of accessing a memory includes the step of partitioning the memory into a plurality of partitions. A primary logical identifier is stored in the memory to identify each partition. A redundant secondary logical identifier is also stored in the memory to identify each partition. In response to a requested partition number identifying a partition to access, at least one partition of data is located using a first stored logical identifier formed from a portion of each of the primary and secondary logical identifiers. The at least one partition of data is then identified using a second stored logical identifier formed from a portion of at least one of the primary and secondary logical identifiers. In one embodiment, a first error detection code (EDC) stored in the header is used to validate the partition data. If an error is detected, the validity of the partition data is tested using an EDC computed by ANDing the first EDC and a second EDC stored in the header.
    Type: Grant
    Filed: December 22, 1995
    Date of Patent: February 23, 1999
    Assignee: Intel Corporation
    Inventors: Robert N. Hasbun, Daniel H. Leemann