Patents by Inventor Daniel J. Bernier

Daniel J. Bernier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system for distributed clock failure protection in a packet switched network
    Patent number: 6754171
    Abstract: Protection from a distributed clock failure in a packet switched network device involves monitoring primary clocking information that is received from an input port of the network device, distributing the clocking information to an output port for use in synchronous transmissions, and supplying backup clocking information from within the packet switched network device to the output port if the primary clocking information fails. In an embodiment, the integrity of the primary clocking information is directly monitored in hardware and the backup clocking information is provided by a local clock source that is located within the network device. If a failure in the primary clocking information is detected, the backup clocking information is supplied to the output port from the local clock source.
    Type: Grant
    Filed: May 18, 2000
    Date of Patent: June 22, 2004
    Assignee: Enterasys Networks, Inc.
    Inventors: Daniel J. Bernier, Deborah E. Edin, Stewart G. Kenly