Abstract: Described herein are systems and methods that reduce settling time in amplifier circuits, such as voltage sense amplifiers (VSA) or current sense amplifiers (CSA) circuits, that comprise a feedback path. When the feedback path is interrupted via a switch, a CSA circuit switches to open loop. A sample-and-hold circuit holds the output voltage of the amplifier, such that when a load is connected to the CSA circuit, the open loop settling time, which is shorter than the closed loop settling time, is allowed to pass before the CSA output voltage is measured, thereby, advantageously preventing any potential disturbance present at the CSA output from being fed back to the CSA input.

Abstract: Described herein are systems and methods for real-time fault detection in electrical circuits. Various embodiments provide a fault detection circuit that uses a resistor network that is controlled to detect an internal current leak in multiple directions, e.g., to ground or to a power supply. The magnitude of the leakage current may be estimated from voltage measurements at voltage pins. In addition, as part of circuit diagnostics, open and short circuit fault conditions may be identified by using current sources and measuring deflections at the voltage pins.

Abstract: Described herein are systems and methods that reduce settling time in amplifier circuits, such as voltage sense amplifiers (VSA) or current sense amplifiers (CSA) circuits, that comprise a feedback path. When the feedback path is interrupted via a switch, a CSA circuit switches to open loop. A sample-and-hold circuit holds the output voltage of the amplifier, such that when a load is connected to the CSA circuit, the open loop settling time, which is shorter than the closed loop settling time, is allowed to pass before the CSA output voltage is measured, thereby, advantageously preventing any potential disturbance present at the CSA output from being fed back to the CSA input.

Abstract: In one embodiment, an implantable pulse generator (IPG) for generating electrical pulses for stimulation of tissue of a patient, comprises: a controller for controlling operations of the IPG; pulse generating circuitry for generating electrical pulses; and conversion circuitry for converting a received logic signal generated by a first voltage domain for provision to a second voltage domain, the conversion circuitry comprising a first stage and a second stage, wherein (i) the first stage receives first signals at first and second logic levels; (ii) the second stage receives second signals at third and fourth logic levels, (iii) the second stage comprising two sets of cross-coupled transistors for generating a rail-to-rail output at the third and fourth logic levels according to whether the received logic signal is at the first or second logic level.

Abstract: In one embodiment, a method, of operating an IPG, comprises: generating a variable anode voltage by first circuitry to drive current during pulse generation, the first circuitry being programmable to generate the anode voltage from a plurality of voltages in response to a control signal; providing the anode voltage to a first circuit node; operating a transistor to control current flow between the first circuit node and an output of the IPG, wherein the transistor possesses a gate-to-source breakdown voltage; generating a first supply signal that is maintained at a voltage level equal to the anode voltage plus or minus a predetermined amount; and selectively applying the first supply signal and a second supply signal to a gate of the transistor to connect or disconnect the first circuit node in a circuit path with the output of the IPG.

Abstract: In one embodiment, a method, of operating an IPG, comprises: generating a variable anode voltage by first circuitry to drive current during pulse generation, the first circuitry being programmable to generate the anode voltage from a plurality of voltages in response to a control signal; providing the anode voltage to a first circuit node; operating a transistor to control current flow between the first circuit node and an output of the IPG, wherein the transistor possesses a gate-to-source breakdown voltage; generating a first supply signal that is maintained at a voltage level equal to the anode voltage plus or minus a predetermined amount; and selectively applying the first supply signal and a second supply signal to a gate of the transistor to connect or disconnect the first circuit node in a circuit path with the output of the IPG.

Abstract: In one embodiment, an implantable pulse generator (IPG) for generating electrical pulses for stimulation of tissue of a patient, comprises: a controller for controlling operations of the IPG; pulse generating circuitry for generating electrical pulses; and conversion circuitry for converting a received logic signal generated by a first voltage domain for provision to a second voltage domain, the conversion circuitry comprising a first stage and a second stage, wherein (i) the first stage receives first signals at first and second logic levels; (ii) the second stage receives second signals at third and fourth logic levels, (iii) the second stage comprising two sets of cross-coupled transistors for generating a rail-to-rail output at the third and fourth logic levels according to whether the received logic signal is at the first or second logic level.

Abstract: A pipelined current mode analog-to-digital converter, including: a plurality of stages each having a first sample and hold circuit configured to receive an analog signal having a current; the sample and hold circuit having at least first and second outputs; the first output having a current from a current copier configured to copy the analog signal; the second output having a current from a current mirror configured to mirror the analog signal; a current mode analog-to-digital converter configured to create a digital signal from the second output, the second output being connected to an input of the analog-to-digital converter; and a current mode digital-to-analog converter configured to convert the digital signal back to an analog signal, wherein an output of the digital-to-analog converter is subtracted from the first output of the sample and hold circuit.

Abstract: A pipelined current mode analog-to-digital converter, including: a plurality of stages each having a first sample and hold circuit configured to receive an analog signal having a current; the sample and hold circuit having at least first and second outputs; the first output having a current from a current copier configured to copy the analog signal; the second output having a current from a current mirror configured to mirror the analog signal; a current mode analog-to-digital converter configured to create a digital signal from the second output, the second output being connected to an input of the analog-to-digital converter; and a current mode digital-to-analog converter configured to convert the digital signal back to an analog signal, wherein an output of the digital-to-analog converter is subtracted from the first output of the sample and hold circuit.