Patents by Inventor Daniel J. Cimino
Daniel J. Cimino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7944942Abstract: A Point-to-Point Protocol (PPP) identifier (PPP ID) value of a PPP frame, including data, is converted to an associated Ethernet Virtual Local Area Network (VLAN) tag identifier (ID) value to enable the PPP ID value information to be communicated in an Ethernet frame to the next transmission layer for use in routing the data from the PPP frame.Type: GrantFiled: June 24, 2008Date of Patent: May 17, 2011Assignee: Extreme Networks, Inc.Inventors: Daniel J. Cimino, Stephen R. Haddock, Matthew T. Knudstrup
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Patent number: 7400647Abstract: A Point-to-Point Protocol (PPP) identifier (PPP ID) value of a PPP frame, including data, is converted to an associated Ethernet Virtual Local Area Network (VLAN) tag identifier (ID) value to enable the PPP ID value information to be communicated in an Ethernet frame to the next transmission layer for use in routing the data from the PPP frame.Type: GrantFiled: January 13, 2003Date of Patent: July 15, 2008Assignee: Extreme NetworksInventors: Daniel J. Cimino, Stephen R. Haddock, Matthew T. Knudstrup
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Patent number: 7372813Abstract: Information is directed across the same corresponding virtual channels in both a first network switch and a second network switch. As a result, any congestion in the second network switch results only in packet dropping associated with the particular congested virtual channel. However, information continues to move across the remaining uncongested virtual channels. As a result, even if congestion occurs in the second network switch, information continues to flow across the single network link between the first and second network switches, i.e., the single network link is not shut down.Type: GrantFiled: November 26, 2002Date of Patent: May 13, 2008Assignee: Extreme NetworksInventors: Daniel J. Cimino, Stephen R. Haddock, Matthew T. Knudstrup
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Patent number: 6023471Abstract: A network interconnect device and message exchange protocol for forwarding data among packet forwarding devices are provided. According to one aspect of the present invention, data is forwarded between a first and second packet forwarding device coupled to an interconnect device. The interconnect device receives a menu message from the first packet forwarding device that indicates one or more types of data that are awaiting transmission on the first packet forwarding device. Based upon the menu message, the interconnect device transmits an order message selecting a type of data of the one or more types of data awaiting transmission to the first packet forwarding device. The interconnect device receives a message from the first packet forwarding device containing data of the type selected by the order message. The interconnect device then forwards the data to the second packet forwarding device.Type: GrantFiled: February 27, 1998Date of Patent: February 8, 2000Assignee: Extreme NetworksInventors: Stephen R. Haddock, Herb Schneider, Curt Berg, Daniel J. Cimino, Siddharth Khattar, Matthew T. Knudstrup, Mark Thomas Lytwyn, Aaron C. Tyler, Michael Yip
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Patent number: 5974467Abstract: A message exchange protocol for interconnecting packet forwarding devices through an intermediate network interconnect device is provided. According to one aspect of the present invention, a method is provided for communicating data between packet forwarding devices. The presence of an interconnect device that is coupled between a first packet forwarding device and a second packet forwarding device is detected by recognizing a configuration sequence, for example. After the link between the interconnect device and the first packet forwarding device is established, the first packet forwarding device receives a command from the interconnect device requesting the types of data that are pending on the first packet forwarding device. Responsive to the command, the first packet forwarding device transmits a "menu" including information indicating the availability of one or more types of data that are awaiting transmission to the interconnect device.Type: GrantFiled: February 27, 1998Date of Patent: October 26, 1999Assignee: Extreme NetworksInventors: Stephen R. Haddock, Herb Schneider, Daniel J. Cimino, Siddharth Khattar, Matthew T. Knudstrup, Aaron C. Tyler
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Patent number: 5396495Abstract: The present invention is directed to various features of a repeater interface controller (RIC) that connects segments of a bus/tree local area network. In the described embodiment of the invention, the RIC implements the IEEE 802.3 repeater specification.In accordance with another aspect of the present invention, the RIC provides hub management support in the form of information regarding the status of its ports and of the packets it is repeating. This data is available in three forms: counted events, recorded events and status packets. This information is available through the RIC's interface. The counters and event recording registers have user-definable masks which enable them to be configured to count and record a variety of events.In accordance with another aspect of the present invention, the RIC management statistics at maximum network bandwidth. Statistics are logged while a packet repetition is in process and are furnished to counter and flag arrays after transmission of the same packet has ended.Type: GrantFiled: June 18, 1993Date of Patent: March 7, 1995Assignee: National Semiconductor CorporationInventors: Charles A. Moorwood, Charan J. Singh, Daniel J. Cimino, Howard Quoc Vo
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Patent number: 5384767Abstract: The nodes of a repeater interface controller which repeats data packets received from one segment of a local area network onto the remaining segments of the local area network include loopback circuitry that allow the data packets received from the one segment to be repeated back onto the one segment in addition to the remaining segments of the local area network, thereby allowing the integrity of the one segment to be verified.Type: GrantFiled: June 15, 1992Date of Patent: January 24, 1995Assignee: National Semiconductor CorporationInventors: Charles A. Moorwood, Charan J. Singh, Dennis E. Holland, Daniel J. Cimino, Howard Q. Vo, Vickie M. Yeung, David Crosbie, Haresh K. Shah
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Patent number: 5379289Abstract: A media access controller is provided by the present invention. A feature of the media access controller of the present invention is a content addressable memory architecture whereby address filtering is provided for filtering physical, group and broadcast addresses on an Ethernet network. Another feature of the present invention is an interface architecture capable of supporting external address filters which in turn are capable of supporting spanning tree and source routing algorithms. Still another feature of the present invention is a CRC checker having improved testability such that burdensome computations for input bit test patterns are no longer required. Still another feature of the present invention is a first-in, first-out memory register having validity bits associated with each stored data byte, such that data bytes may be indiscriminately stored, regardless of their validity, and invalid data bytes are discarded during retrieval of the stored data bytes.Type: GrantFiled: July 16, 1993Date of Patent: January 3, 1995Assignee: National Semiconductor CorporationInventors: Edwin Z. DeSouza, Daniel J. Cimino
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Patent number: 5293375Abstract: A repeater interface controller receives a data packet at one of a plurality of port nodes from an associated segment of a local area network. The port nodes determine a priority port node, if more than one port node receives a data packet at substantially the same time, and transmit the data packet from the priority port node to a central node. The central node receives the data packet, repeats the data packet from the priority node, and transmits the repeated data packet to the non-priority port nodes. Each non-priority port node receives the repeated data packet and transmits the repeated data onto its associated segment. Each port node further includes a partitioning port state machine which monitors its associated segment and partitions the segment from the repeater interface controller when the partitioning port state machine detects a collision in a predetermined number of consecutive data packets.Type: GrantFiled: August 14, 1992Date of Patent: March 8, 1994Assignee: National Semiconductor CorporationInventors: Charles A. Moorwood, Charan J. Singh, Dennis E. Holland, Daniel J. Cimino, Howard Q. Vo, Vickie M. Yeung, David Crosbie, Haresh K. Shah
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Patent number: 5245617Abstract: A media access controller is provided by the present invention. A feature of the media access controller of the present invention is a content addressable memory architecture whereby address filtering is provided for filtering physical, group and broadcast addresses on an Ethernet network. Another feature of the present invention is an interface architecture capable of supporting external address filters which in turn are capable of supporting spanning tree and source routing algorithms. Still another feature of the present invention is a CRC checker having improved testability such that burdensome computations for input bit test patterns are no longer required. Still another feature of the present invention is a first-in, first-out memory register having validity bits associated with each stored data byte, such that data bytes may be indiscriminately stored, regardless of their validity, and invalid data bytes are discarded during retrieval of the stored data bytes.Type: GrantFiled: March 6, 1992Date of Patent: September 14, 1993Assignee: National Semiconductor CorporationInventors: Edwin Z. DeSouza, Daniel J. Cimino, Ramin Shirani, Mark R. Waggoner
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Patent number: 5164943Abstract: A media access controller is provided by the present invention. A feature of the media access controller of the present invention is a content addressable memory architecture whereby address filtering is provided for filtering physical, group and broadcast addresses on an Ethernet network. Another feature of the present invention is an interface architecture capable of supporting external address filters which in turn are capable of supporting spanning tree and source routing algorithms. Still another feature of the present invention is a CRC checker having improved testability such that burdensome computations for input bit test patterns are no longer required. Still another feature of the present invention is a first-in, first-out memory register having validity bits associated with each stored data byte, such that data bytes may be indiscriminately stored, regardless of their validity, and invalid data bytes are discarded during retrieval of the stored data bytes.Type: GrantFiled: March 6, 1992Date of Patent: November 17, 1992Assignee: National Semiconductor CorporationInventors: Edwin Z. DeSouza, Daniel J. Cimino, Ramin Shirani, Mark R. Waggoner