Patents by Inventor Daniel J. Fleming

Daniel J. Fleming has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8273407
    Abstract: A method of fabricating a film of magnetic nanocomposite particles including depositing isolated clusters of magnetic nanoparticles onto a substrate surface and coating the isolated clusters of magnetic nanoparticles with an insulator coating. The isolated clusters of magnetic nanoparticles have a dimension in the range between 1 and 300 nanometers and are separated from each other by a distance in the range between 1 and 50 nanometers. By employing PVD, ablation, and CVD techniques the range of useful film thicknesses is extended to 10-1000 nm, suitable for use in wafer based processing. The described methods for depositing the magnetic nanocomposite thin films are compatible with conventional IC wafer and Integrated Passive Device fabrication.
    Type: Grant
    Filed: January 29, 2007
    Date of Patent: September 25, 2012
    Inventors: Albert S. Bergendahl, Paul C. Castrucci, Daniel J. Fleming, Danny Tongsan Xiao
  • Publication number: 20070178229
    Abstract: A method of fabricating a film of magnetic nanocomposite particles including depositing isolated clusters of magnetic nanoparticles onto a substrate surface and coating the isolated clusters of magnetic nanoparticles with an insulator coating. The isolated clusters of magnetic nanoparticles have a dimension in the range between 1 and 300 nanometers and are separated from each other by a distance in the range between 1 and 50 nanometers. By employing PVD, ablation, and CVD techniques the range of useful film thicknesses is extended to 10-1000 nm, suitable for use in wafer based processing. The described methods for depositing the magnetic nanocomposite thin films are compatible with conventional IC wafer and Integrated Passive Device fabrication.
    Type: Application
    Filed: January 29, 2007
    Publication date: August 2, 2007
    Inventors: Albert S. Bergendahl, Paul C. Castrucci, Daniel J. Fleming, T. D. Xiao
  • Patent number: 5647484
    Abstract: An encasement device for a portable computer and other associated peripheral devices, which when opened represents an organized, and ready-to-use standalone workstation. It includes a top box-type structure and a bottom box-type structure both having a front, a back, a pair of side walls and cover or bottom respectively. The top box-type structure is hingedly connected and securable to the bottom box-type structure. A droppable front is provided for easy access to the keyboard of the portable computer and has a wrist pad. Alternatively, the case is provided with a contoured structure for easy access. The portable computer is removeably attached to the bottom box-type structure such that access is available to side-orientated internal devices. An electrical containment section is provided to hold connectors, an outlet cord, surge protectors and power conditioners. A foldable staging area is provided to removeably hold a peripheral device.
    Type: Grant
    Filed: May 31, 1996
    Date of Patent: July 15, 1997
    Inventor: Daniel J. Fleming
  • Patent number: 4373166
    Abstract: A self-isolated Schottky Barrier diode structure and method of fabrication are disclosed for generating a device having controlled characteristics. An opening is made through an oxide layer over a central region of an n-type semiconductor substrate. The opening has inclined sidewalls over an annular region surrounding the central region of the substrate. An n-type dopant layer is ion implanted through the opening and the surrounding oxide layer. This controls the barrier height for the Schottky Barrier diode and controls the lifetime of minority carriers in the outside region of the substrate. This has the effect of minimizing PNP parasitic transistor action. A Schottky Barrier contact is formed in the opening through an oxide layer creating a rectifying junction with the semiconductor substrate in the central region.
    Type: Grant
    Filed: December 19, 1980
    Date of Patent: February 8, 1983
    Assignee: IBM Corporation
    Inventors: D. L. Bergeron, Daniel J. Fleming, Geoffrey B. Stephens
  • Patent number: 4357178
    Abstract: A self-isolated Schottky Barrier diode structure and method of fabrication are disclosed for generating a device having controlled characteristics. An opening is made through an oxide layer over a central region of an n-type semiconductor substrate. The opening has inclined sidewalls over an annular region surrounding the central region of the substrate. An n-type dopant layer is ion implanted through the opening and the surrounding oxide layer. This controls the barrier height for the Schottky Barrier diode. In the region of the substrate surrounding the annular region, where the ion implantation takes place through the full thickness of the oxide, the lifetime of minority carriers is controlled. This has the effect of minimizing PNP parasitic transistor action. A Schottky Barrier contact is formed in the opening through the oxide layer creating a rectifying junction with the semiconductor substrate in the central region.
    Type: Grant
    Filed: November 10, 1980
    Date of Patent: November 2, 1982
    Assignee: IBM Corporation
    Inventors: David L. Bergeron, Daniel J. Fleming, Geoffrey B. Stephens