Patents by Inventor Daniel J. Magenheimer

Daniel J. Magenheimer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10346208
    Abstract: To provide an arrangement of virtual machines on physical machines, at least one controller compares indicators associated with plural different layouts of the virtual machines on the physical machines, wherein the indicators provide information regarding performances of corresponding layouts. The at least one controller selects one of the plural layouts based on the comparing.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: July 9, 2019
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Chris D. Hyser, Bret A. McKee, Robert D. Gardner, Daniel J. Magenheimer
  • Publication number: 20150286506
    Abstract: To provide an arrangement of virtual machines on physical machines, at least one controller compares indicators associated with plural different layouts of the virtual machines on the physical machines, wherein the indicators provide information regarding performances of corresponding layouts. The at least one controller selects one of the plural layouts based on the comparing.
    Type: Application
    Filed: June 18, 2015
    Publication date: October 8, 2015
    Inventors: Chris D. Hyser, Bret A. McKee, Robert D. Gartner, Daniel J. Magenheimer
  • Patent number: 9092250
    Abstract: To provide an arrangement of virtual machines on physical machines, at least one controller compares indicators associated with plural different layouts of the virtual machines on the physical machines, wherein the indicators provide information regarding performances of corresponding layouts. The at least one controller selects one of the plural layouts based on the comparing.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: July 28, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Chris D. Hyser, Bret A. McKee, Robert D. Gardner, Daniel J. Magenheimer
  • Patent number: 8327354
    Abstract: A system for providing virtualization that includes a processor operable to execute one or more machine-readable instructions, the processor having a native instruction set architecture (ISA) and a virtual machine monitor (VMM) operable to host at least a first virtual machine having a first ISA different from the native ISA, the VMM having integrated therein a first dynamic binary translation (DBT) layer to assist in an execution of a first application of the first ISA in the first virtual machine by the processor having the native ISA.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: December 4, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Daniel J. Magenheimer, Parthasarathy Ranganathan, Matthew Chapman
  • Patent number: 8296760
    Abstract: A command is received to place a first physical machine into a lower power mode. The first physical machine has a virtual machine. In response to the received command, a procedure is performed to migrate the virtual machine from the first physical machine to a second physical machine.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: October 23, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Daniel J. Magenheimer, Bret A. McKee, Robert D. Gardner, Chris D. Hyser
  • Patent number: 7877747
    Abstract: According to at least one embodiment, a flexible operating system comprises operability for executing in a first manner as a native operating system on a computer system and for executing in a second manner as a virtualized operating system on the computer system. The flexible operating system further comprises code for determining whether it is being used as a native operating system or as a virtualized operating system on the computer system.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: January 25, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Daniel J. Magenheimer
  • Patent number: 7784063
    Abstract: In various embodiments of the present invention, execution-state transitions occur in a first portion of a system, and a cumulative execution state for each process is maintained by a second portion of the system so that, when a second-portion routine is called, the second-portion routine can determine whether or not the current execution state is suitable for execution of the second-portion routine. In various embodiments, a callpoint log, allocated and maintained for each process, stores the cumulative execution state for the process. In one embodiment, the first portion is an operating system, and the second portion is a secure kernel, with the cumulative execution state used by the secure kernel to prevent unauthorized access by erroneously or maliciously invoked operating-system routines to secure kernel routines. In another embodiment, the cumulative execution state is used as a debugging tool by the second-portion routines to catch errors in the implementation of the first-portion routines.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: August 24, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: John Worley, Daniel J. Magenheimer, Chris D. Hyser, Robert D. Gardner, Thomas W. Christian, Bret McKee, Christopher Worley, William S. Worley, Jr.
  • Publication number: 20080104587
    Abstract: A command is received to place a first physical machine into a lower power mode. The first physical machine has a virtual machine. In response to the received command, a procedure is performed to migrate the virtual machine from the first physical machine to a second physical machine.
    Type: Application
    Filed: October 27, 2006
    Publication date: May 1, 2008
    Inventors: Daniel J. Magenheimer, Bret A. McKee, Robert D. Gardner, Chris D. Hyser
  • Patent number: 7363536
    Abstract: One embodiment of the invention is a method for handling an interruption during execution of an application on a computer system that uses a register stack, the method comprising receiving the interruption by a hypervisor, sending the interruption to an operating system for handling; if the register stack has a fault, then generating, by the operating system, another interruption that is delivered to the hypervisor; after receiving the another interruption, covering, by the hypervisor, the register stack; after covering the register stack, sending the interruption to the operating system for handling; and after handling, returning to execution of the application.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: April 22, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Robert D. Gardner, Daniel J. Magenheimer
  • Patent number: 7073059
    Abstract: A combined-hardware-and-software secure-platform interface to which operating systems and customized control programs interface within a computer system. The combined-hardware-and-software secure-platform interface employs a hardware platform that provides at least four privilege levels, non-privileged instructions, non-privileged registers, privileged instructions, privileged registers, and firmware interfaces. The combined-hardware-and-software secure-platform interface conceals all privileged instructions, privileged registers, and firmware interfaces and privileged registers from direct access by operating systems and custom control programs, providing to the operating systems and custom control programs the non-privileged instructions and non-privileged registers provided by the hardware platform as well as a set of callable software services.
    Type: Grant
    Filed: April 8, 2002
    Date of Patent: July 4, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: William S. Worely, Jr., John S. Worley, Daniel J. Magenheimer, Chris D. Hyser, Tom Christian, Bret McKee, Robert Gardner
  • Publication number: 20020194389
    Abstract: A combined-hardware-and-software secure-platform interface to which operating systems and customized control programs interface within a computer system. The combined-hardware-and-software secure-platform interface employs a hardware platform that provides at least four privilege levels, non-privileged instructions, non-privileged registers, privileged instructions, privileged registers, and firmware interfaces. The combined-hardware-and-software secure-platform interface conceals all privileged instructions, privileged registers, and firmware interfaces and privileged registers from direct access by operating systems and custom control programs, providing to the operating systems and custom control programs the non-privileged instructions and non-privileged registers provided by the hardware platform as well as a set of callable software services.
    Type: Application
    Filed: April 8, 2002
    Publication date: December 19, 2002
    Inventors: William S. Worley, John S. Worley, Daniel J. Magenheimer, Chris D. Hyser, Tom Christian, Bret McKee, Robert Gardner