Patents by Inventor Daniel J. Perkin

Daniel J. Perkin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8930904
    Abstract: A method for verifying an input/output (I/O) hardware configuration is provided. Data from an input/output data set (IOCDS) is extracted for building a verification command. The IOCDS contains hardware requirements that define at least software devices associated with a logical control unit (LCU). The verification command is processed. The verification command includes a software device address range associated with a logical control unit (LCU) of the I/O hardware. The LCU utilizes a first logical path. The software device address range utilizing the first logical path is compared with an existing software device address range utilizing at least one additional logical path. The verification command is accepted if the software device address range and the existing software device address range match.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: January 6, 2015
    Assignee: International Business Machines Corporation
    Inventors: Juan A. Coronado, Roger G. Hathorn, Dinh H. Le, Daniel J. Perkin, Adelaide M. Richards, Aaron E. Taylor
  • Patent number: 8327331
    Abstract: A method for verifying an input/output (I/O) hardware configuration is provided. A verification command is processed. The verification command includes a software device address range associated with a logical control unit (LCU) of the I/O hardware. The LCU utilizes a first logical path. The software device address range utilizing the first logical path is compared with an existing software device address range utilizing at least one additional logical path. The verification command is accepted if the software device address range and the existing software device address range match.
    Type: Grant
    Filed: January 23, 2008
    Date of Patent: December 4, 2012
    Assignee: International Business Machines Corporation
    Inventors: Juan Alonso Coronado, Roger Gregory Hathorn, Dinh Hai Le, Daniel J. Perkin, Adelaide Margaret Richards, Aaron Eugene Taylor
  • Patent number: 8069364
    Abstract: A system and method for recovering from logical path failures is set forth. More specifically, when a host detects a logical path failure, the host enters a path discovery mode of operation. If the host continues to detect a logical path failure while operating in the logical path discovery mode of operation, the host removes the logical path from a logical path mask, and the host does not use the removed logical path again. Additionally, the system and method facilitates recovery of the failed logical paths by using a plurality of logical path masks. A first mask is referred to as an intermediate failure logical path mask and a second mask is referred to as a permanent failure logical path mask.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: November 29, 2011
    Assignee: International Business Machines Corporation
    Inventors: Juan Alonso Coronado, Roger Gregory Hathorn, Bret Wayne Holley, Daniel J. Perkin, Dinh Hai Le
  • Patent number: 7996707
    Abstract: A system and method for recovering from a single logical path failure. More specifically, although a host has not grouped its logical paths, the host knows which logical paths it has available. When a host detects a logical path failure, the host enters a path discovery mode of operation. If the host continues to detect a logical path failure while operating in the logical path discovery mode of operation, the host removes the logical path from a logical path mask, and the host does not use the removed logical path again. In the case of ungrouped logical paths, the host aborts its process because it does not have more paths available to continue its process. Additionally, in certain embodiments, a pseudo path group for ungrouped logical paths is created.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: August 9, 2011
    Assignee: International Business Machines Corporation
    Inventors: Juan A. Coronado, Roger G. Hathorn, Bret W. Holley, Daniel J. Perkin, Dinh H. Le
  • Publication number: 20100023802
    Abstract: A system and method for recovering from logical path failures is set forth. More specifically, when a host detects a logical path failure, the host enters a path discovery mode of operation. If the host continues to detect a logical path failure while operating in the logical path discovery mode of operation, the host removes the logical path from a logical path mask, and the host does not use the removed logical path again. Additionally, the system and method facilitates recovery of the failed logical paths by using a plurality of logical path masks. A first mask is referred to as an intermediate failure logical path mask and a second mask is referred to as a permanent failure logical path mask.
    Type: Application
    Filed: July 25, 2008
    Publication date: January 28, 2010
    Inventors: Juan Alonso Coronado, Roger Gregory Hathorn, Bret Wayne Holley, Daniel J. Perkin, Dinh Hai Le
  • Publication number: 20100023801
    Abstract: A system and method for recovering from a single logical path failure. More specifically, although a host has not grouped its logical paths, the host knows which logical paths it has available. When a host detects a logical path failure, the host enters a path discovery mode of operation. If the host continues to detect a logical path failure while operating in the logical path discovery mode of operation, the host removes the logical path from a logical path mask, and the host does not use the removed logical path again. In the case of ungrouped logical paths, the host aborts its process because it does not have more paths available to continue its process. Additionally, in certain embodiments, a pseudo path group for ungrouped logical paths is created.
    Type: Application
    Filed: July 25, 2008
    Publication date: January 28, 2010
    Inventors: Juan A. Coronado, Roger G. Hathorn, Bret W. Holley, Daniel J. Perkin, Dinh H. Le
  • Publication number: 20090187891
    Abstract: A method for verifying an input/output (I/O) hardware configuration is provided. A verification command is processed. The verification command includes a software device address range associated with a logical control unit (LCU) of the I/O hardware. The LCU utilizes a first logical path. The software device address range utilizing the first logical path is compared with an existing software device address range utilizing at least one additional logical path. The verification command is accepted if the software device address range and the existing software device address range match.
    Type: Application
    Filed: January 23, 2008
    Publication date: July 23, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Juan Alonso CORONADO, Roger Gregory HATHORN, Dinh Hai LE, Daniel J. PERKIN, Adelaide Margaret RICHARDS, Aaron Eugene TAYLOR